4 uses HAVE_FALLBACK_BOOT
8 uses CONFIG_LOGICAL_CPUS
9 uses CONFIG_MAX_PHYSICAL_CPUS
12 uses CONFIG_ROM_STREAM
13 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
17 uses LB_CKS_RANGE_START
20 uses MAINBOARD_PART_NUMBER
23 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
24 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
29 uses DEFAULT_CONSOLE_LOGLEVEL
30 uses MAXIMUM_CONSOLE_LOGLEVEL
31 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
32 uses CONFIG_CONSOLE_SERIAL8250
33 uses CONFIG_UDELAY_TSC
34 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
42 uses CONFIG_CONSOLE_VGA
43 uses CONFIG_PCI_ROM_RUN
48 ## The default definitions are used for these
49 uses CONFIG_ROM_STREAM_START
52 ## These are defined in target Config.lb, don't add here
53 uses USE_FALLBACK_IMAGE
57 uses LINUXBIOS_EXTRA_VERSION
59 ## These are defined in mainboard Config.lb, don't add here
61 uses ROM_SECTION_OFFSET
71 ## ROM_SIZE is the size of boot ROM that this board will use.
73 default ROM_SIZE=2097152
74 default ROM_IMAGE_SIZE = 65536
77 ## Build code for the fallback boot?
79 default HAVE_FALLBACK_BOOT=1
80 default FALLBACK_SIZE=131072
83 ## Delay timer options
85 default CONFIG_UDELAY_TSC=1
86 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
89 ## Build code to export a programmable irq routing table
91 default HAVE_PIRQ_TABLE=1
92 default IRQ_SLOT_COUNT=12
95 ## Build code to export an x86 MP table
96 ## Useful for specifying IRQ routing values
98 default HAVE_MP_TABLE=1
100 ## Build code to export ACPI tables?
101 default HAVE_ACPI_TABLES=1
104 ## Build code to export a CMOS option table?
106 default HAVE_OPTION_TABLE=0
108 ## CMOS checksum definitions (units == bytes)
109 ## These must match the checksum record in cmos.layout
110 default LB_CKS_RANGE_START=128
111 default LB_CKS_RANGE_END=130
112 default LB_CKS_LOC=131
115 ## Build code for SMP support
116 ## Only worry about 2 micro processors
117 ## NOTE: CONFIG_MAX_CPUS is the number of LOGICAL CPUs,
118 ## so if CONFIG_LOGICAL_CPUS is 1, CONFIG_MAX_CPUS should be 4.
121 default CONFIG_MAX_CPUS=2
122 default CONFIG_LOGICAL_CPUS=0
123 default CONFIG_MAX_PHYSICAL_CPUS=2
126 # NOTE: to initialize VGA, need to copy the VGA option ROM from the factory BIOS
128 default CONFIG_CONSOLE_VGA=0
129 default CONFIG_PCI_ROM_RUN=0
132 ## Build code to setup a generic IOAPIC
134 default CONFIG_IOAPIC=1
137 ## Motherboard identification
139 default MAINBOARD_PART_NUMBER="EIDXE7501DEVKIT"
140 default MAINBOARD_VENDOR="Intel"
141 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x8086
142 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2480
145 ### LinuxBIOS layout values
149 ## Use a small 8K stack
151 default STACK_SIZE=0x2000
154 ## Use a small 16K heap
156 default HEAP_SIZE=0x4000
159 ## CMOS settings not currently supported due to conflicts with factory BIOS
161 default USE_OPTION_TABLE = 0
164 ## LinuxBIOS C code runs at this location in RAM
166 default _RAMBASE=0x00004000
169 ## Load the payload from the ROM
171 default CONFIG_ROM_STREAM = 1
174 ### Defaults of options that you may want to override in the target config file
178 ## The default compiler
180 default CC="$(CROSS_COMPILE)gcc -m32"
184 ## Disable the gdb stub by default
186 default CONFIG_GDB_STUB=0
189 ## The Serial Console
192 # To Enable the Serial Console
193 default CONFIG_CONSOLE_SERIAL8250=1
195 ## Select the serial console baud rate
196 default TTYS0_BAUD=115200
197 #default TTYS0_BAUD=57600
198 #default TTYS0_BAUD=38400
199 #default TTYS0_BAUD=19200
200 #default TTYS0_BAUD=9600
201 #default TTYS0_BAUD=4800
202 #default TTYS0_BAUD=2400
203 #default TTYS0_BAUD=1200
205 # Select the serial console base port
206 default TTYS0_BASE=0x3f8
208 # Select the serial protocol
209 # This defaults to 8 data bits, 1 stop bit, and no parity
210 default TTYS0_LCS=0x3
213 ### Select the linuxBIOS loglevel
215 ## EMERG 1 system is unusable
216 ## ALERT 2 action must be taken immediately
217 ## CRIT 3 critical conditions
218 ## ERR 4 error conditions
219 ## WARNING 5 warning conditions
220 ## NOTICE 6 normal but significant condition
221 ## INFO 7 informational
222 ## DEBUG 8 debug-level messages
223 ## SPEW 9 Way too many details
225 ## Request this level of debugging output
226 default DEFAULT_CONSOLE_LOGLEVEL=8
227 ## At a maximum only compile in this level of debugging
228 default MAXIMUM_CONSOLE_LOGLEVEL=8
231 ## Select power on after power fail setting
232 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
234 ## Things we may not have
238 # default CPU_OPT="-g"
239 default CONFIG_CHIP_NAME=1