3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses CONFIG_ROM_PAYLOAD
12 uses MAINBOARD_PART_NUMBER
13 uses COREBOOT_EXTRA_VERSION
22 uses ROM_SECTION_OFFSET
23 uses CONFIG_ROM_PAYLOAD_START
34 uses DEFAULT_CONSOLE_LOGLEVEL
35 uses MAXIMUM_CONSOLE_LOGLEVEL
36 uses CONFIG_CONSOLE_SERIAL8250
40 uses CONFIG_UDELAY_TSC
41 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
42 uses CONFIG_CONSOLE_VGA
43 uses CONFIG_PCI_ROM_RUN
44 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
45 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
46 uses CONFIG_PRECOMPRESSED_PAYLOAD
50 ## ROM_SIZE is the size of boot ROM that this board will use.
51 default ROM_SIZE = 256*1024
58 default CONFIG_CONSOLE_VGA=1
59 default CONFIG_PCI_ROM_RUN=1
62 ## Build code for the fallback boot
64 default HAVE_FALLBACK_BOOT=0
69 default HAVE_MP_TABLE=0
72 ## Build code to reset the motherboard from coreboot
74 default HAVE_HARD_RESET=0
76 ## Delay timer options
78 default CONFIG_UDELAY_TSC=1
79 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
82 ## Build code to export a programmable irq routing table
84 default HAVE_PIRQ_TABLE=1
85 default IRQ_SLOT_COUNT=7
90 ## Build code to export a CMOS option table
92 default HAVE_OPTION_TABLE=1
95 ### coreboot layout values
98 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
99 default ROM_IMAGE_SIZE = 65536
100 default FALLBACK_SIZE = 131072
103 ## Use a small 8K stack
105 default STACK_SIZE=0x2000
108 ## Use a small 16K heap
110 default HEAP_SIZE=0x4000
113 ## Only use the option table in a normal image
115 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
116 default USE_OPTION_TABLE = 0
118 default _RAMBASE = 0x00004000
120 default CONFIG_ROM_PAYLOAD = 1
123 ## The default compiler
125 default CROSS_COMPILE=""
126 default CC="$(CROSS_COMPILE)gcc -m32"
130 ## The Serial Console
133 # To Enable the Serial Console
134 default CONFIG_CONSOLE_SERIAL8250=1
136 ## Select the serial console baud rate
137 default TTYS0_BAUD=115200
138 #default TTYS0_BAUD=57600
139 #default TTYS0_BAUD=38400
140 #default TTYS0_BAUD=19200
141 #default TTYS0_BAUD=9600
142 #default TTYS0_BAUD=4800
143 #default TTYS0_BAUD=2400
144 #default TTYS0_BAUD=1200
146 # Select the serial console base port
147 default TTYS0_BASE=0x3f8
149 # Select the serial protocol
150 # This defaults to 8 data bits, 1 stop bit, and no parity
151 default TTYS0_LCS=0x3
154 ### Select the coreboot loglevel
156 ## EMERG 1 system is unusable
157 ## ALERT 2 action must be taken immediately
158 ## CRIT 3 critical conditions
159 ## ERR 4 error conditions
160 ## WARNING 5 warning conditions
161 ## NOTICE 6 normal but significant condition
162 ## INFO 7 informational
163 ## DEBUG 8 debug-level messages
164 ## SPEW 9 Way too many details
166 ## Request this level of debugging output
167 default DEFAULT_CONSOLE_LOGLEVEL=8
169 ## At a maximum only compile in this level of debugging
170 default MAXIMUM_CONSOLE_LOGLEVEL=8
172 default CONFIG_VIDEO_MB = 0