src/mainboard/ibm/e326/Config.lb

   1 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
   2 default CONFIG_XIP_ROM_SIZE = 64 * 1024
   3 include /config/nofailovercalculation.lb
   4
   5 ##
   6 ## Set all of the defaults for an x86 architecture
   7 ##
   8
   9 arch i386 end
  10
  11 ##
  12 ## Build the objects we have code for in this directory.
  13 ##
  14
  15 driver mainboard.o
  16 if CONFIG_GENERATE_MP_TABLE object mptable.o end
  17 if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
  18
  19 if CONFIG_USE_INIT
  20
  21 makerule ./auto.o
  22         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  23         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  24 end
  25
  26 else
  27
  28 makerule ./auto.inc
  29         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  30         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  31         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  32         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  33 end
  34
  35 end
  36
  37 ##
  38 ## Build our 16 bit and 32 bit coreboot entry code
  39 ##
  40 if CONFIG_USE_FALLBACK_IMAGE
  41         mainboardinit cpu/x86/16bit/entry16.inc
  42         ldscript /cpu/x86/16bit/entry16.lds
  43 end
  44
  45 mainboardinit cpu/x86/32bit/entry32.inc
  46
  47         if CONFIG_USE_INIT
  48                 ldscript /cpu/x86/32bit/entry32.lds
  49         end
  50
  51         if CONFIG_USE_INIT
  52                 ldscript      /cpu/amd/car/cache_as_ram.lds
  53         end
  54
  55 ##
  56 ## Build our reset vector (This is where coreboot is entered)
  57 ##
  58 if CONFIG_USE_FALLBACK_IMAGE
  59         mainboardinit cpu/x86/16bit/reset16.inc
  60         ldscript /cpu/x86/16bit/reset16.lds
  61 else
  62         mainboardinit cpu/x86/32bit/reset32.inc
  63         ldscript /cpu/x86/32bit/reset32.lds
  64 end
  65
  66 ##
  67 ## Include an id string (For safe flashing)
  68 ##
  69 mainboardinit arch/i386/lib/id.inc
  70 ldscript /arch/i386/lib/id.lds
  71
  72 ##
  73 ## Setup Cache-As-Ram
  74 ##
  75 mainboardinit cpu/amd/car/cache_as_ram.inc
  76
  77 ###
  78 ### This is the early phase of coreboot startup
  79 ### Things are delicate and we test to see if we should
  80 ### failover to another image.
  81 ###
  82 if CONFIG_USE_FALLBACK_IMAGE
  83        ldscript /arch/i386/lib/failover.lds
  84 end
  85
  86 ###
  87 ### O.k. We aren't just an intermediary anymore!
  88 ###
  89
  90 ##
  91 ## Setup RAM
  92 ##
  93 if CONFIG_USE_INIT
  94 initobject auto.o
  95 else
  96 mainboardinit ./auto.inc
  97 end
  98
  99 ##
 100 ## Include the secondary Configuration files
 101 ##
 102 config chip.h
 103
 104
 105 chip northbridge/amd/amdk8/root_complex
 106         device apic_cluster 0 on
 107                 chip cpu/amd/socket_940
 108                         device apic 0 on end
 109                 end
 110         end
 111
 112         device pci_domain 0 on
 113                 chip northbridge/amd/amdk8
 114                         device pci 18.0 on end # LDT 0
 115                         device pci 18.0 on     # LDT 1
 116                                 chip southbridge/amd/amd8131
 117                                         device pci 0.0 on end
 118                                         device pci 0.1 on end
 119                                         device pci 1.0 on end
 120                                         device pci 1.1 on end
 121                                 end
 122                                 chip southbridge/amd/amd8111
 123                                         device pci 0.0 on
 124                                                 device pci 0.0 on end
 125                                                 device pci 0.1 on end
 126                                                 device pci 0.2 on end
 127                                                 device pci 1.0 off end
 128                                                device pci 5.0 on end # ATI Rage XL
 129                                         end
 130                                         device pci 1.0 on
 131                                                 chip superio/nsc/pc87366
 132                                                         device  pnp 2e.0 off  # Floppy
 133                                                                  io 0x60 = 0x3f0
 134                                                                 irq 0x70 = 6
 135                                                                 drq 0x74 = 2
 136                                                         end
 137                                                         device pnp 2e.1 off  # Parallel Port
 138                                                                  io 0x60 = 0x378
 139                                                                 irq 0x70 = 7
 140                                                         end
 141                                                         device pnp 2e.2 off # Com 2
 142                                                                  io 0x60 = 0x2f8
 143                                                                 irq 0x70 = 3
 144                                                         end
 145                                                         device pnp 2e.3 on  # Com 1
 146                                                                  io 0x60 = 0x3f8
 147                                                                 irq 0x70 = 4
 148                                                         end
 149                                                         device pnp 2e.4 off end # SWC
 150                                                         device pnp 2e.5 off end # Mouse
 151                                                         device pnp 2e.6 on  # Keyboard
 152                                                                  io 0x60 = 0x60
 153                                                                  io 0x62 = 0x64
 154                                                                 irq 0x70 = 1
 155                                                         end
 156                                                         device pnp 2e.7 off end # GPIO
 157                                                         device pnp 2e.8 off end # ACB
 158                                                         device pnp 2e.9 off end # FSCM
 159                                                         device pnp 2e.a off end # WDT
 160                                                 end
 161                                         end
 162                                         device pci 1.1 on end
 163                                         device pci 1.2 on end
 164                                         device pci 1.3 on end
 165                                         device pci 1.5 off end
 166                                         device pci 1.6 off end
 167                                         register "ide0_enable" = "1"
 168                                         register "ide1_enable" = "1"
 169                                 end
 170                         end #  device pci 18.0
 171                         device pci 18.0 on end # LDT2
 172                         device pci 18.1 on end
 173                         device pci 18.2 on end
 174                         device pci 18.3 on end
 175                 end
 176         end
 177 end
 178