3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
17 uses ROM_SECTION_OFFSET
18 uses CONFIG_ROM_PAYLOAD
19 uses CONFIG_ROM_PAYLOAD_START
20 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
28 uses LB_CKS_RANGE_START
31 uses MAINBOARD_PART_NUMBER
34 uses LINUXBIOS_EXTRA_VERSION
39 uses DEFAULT_CONSOLE_LOGLEVEL
40 uses MAXIMUM_CONSOLE_LOGLEVEL
41 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
42 uses CONFIG_CONSOLE_SERIAL8250
56 ## ROM_SIZE is the size of boot ROM that this board will use.
58 default ROM_SIZE=524288
61 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
63 default FALLBACK_SIZE=0x40000
66 ## Build code for the fallback boot
68 default HAVE_FALLBACK_BOOT=1
71 ## Build code to reset the motherboard from linuxBIOS
73 default HAVE_HARD_RESET=1
76 ## Build code to export a programmable irq routing table
78 default HAVE_PIRQ_TABLE=1
79 default IRQ_SLOT_COUNT=9
82 ## Build code to export an x86 MP table
83 ## Useful for specifying IRQ routing values
85 default HAVE_MP_TABLE=1
88 ## Build code to export a CMOS option table
90 default HAVE_OPTION_TABLE=1
93 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
95 default LB_CKS_RANGE_START=49
96 default LB_CKS_RANGE_END=122
97 default LB_CKS_LOC=123
100 ## Build code for SMP support
101 ## Only worry about 2 micro processors
104 default CONFIG_MAX_CPUS=1
105 default CONFIG_MAX_PHYSICAL_CPUS=1
108 ## Build code to setup a generic IOAPIC
110 default CONFIG_IOAPIC=1
113 ## Clean up the motherboard id strings
115 default MAINBOARD_PART_NUMBER="E325"
116 default MAINBOARD_VENDOR="IBM"
117 #default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
118 #default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
121 ### LinuxBIOS layout values
124 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
125 default ROM_IMAGE_SIZE = 65536
128 ## Use a small 8K stack
130 default STACK_SIZE=0x2000
133 ## Use a small 16K heap
135 default HEAP_SIZE=0x8000
138 ## Only use the option table in a normal image
140 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
143 ## LinuxBIOS C code runs at this location in RAM
145 default _RAMBASE=0x00004000
148 ## Load the payload from the ROM
150 default CONFIG_ROM_PAYLOAD = 1
153 ### Defaults of options that you may want to override in the target config file
157 ## The default compiler
159 default CC="$(CROSS_COMPILE)gcc -m32"
163 ## The Serial Console
166 # To Enable the Serial Console
167 default CONFIG_CONSOLE_SERIAL8250=1
169 ## Select the serial console baud rate
170 default TTYS0_BAUD=115200
171 #default TTYS0_BAUD=57600
172 #default TTYS0_BAUD=38400
173 #default TTYS0_BAUD=19200
174 #default TTYS0_BAUD=9600
175 #default TTYS0_BAUD=4800
176 #default TTYS0_BAUD=2400
177 #default TTYS0_BAUD=1200
179 # Select the serial console base port
180 default TTYS0_BASE=0x3f8
182 # Select the serial protocol
183 # This defaults to 8 data bits, 1 stop bit, and no parity
184 default TTYS0_LCS=0x3
187 ### Select the linuxBIOS loglevel
189 ## EMERG 1 system is unusable
190 ## ALERT 2 action must be taken immediately
191 ## CRIT 3 critical conditions
192 ## ERR 4 error conditions
193 ## WARNING 5 warning conditions
194 ## NOTICE 6 normal but significant condition
195 ## INFO 7 informational
196 ## DEBUG 8 debug-level messages
197 ## SPEW 9 Way too many details
199 ## Request this level of debugging output
200 default DEFAULT_CONSOLE_LOGLEVEL=8
201 ## At a maximum only compile in this level of debugging
202 default MAXIMUM_CONSOLE_LOGLEVEL=8
205 ## Select power on after power fail setting
206 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"