src/mainboard/ibm/e325/Config.lb

   1 include /config/nofailovercalculation.lb
   2
   3 ##
   4 ## Set all of the defaults for an x86 architecture
   5 ##
   6
   7 arch i386 end
   8
   9 ##
  10 ## Build the objects we have code for in this directory.
  11 ##
  12
  13 driver mainboard.o
  14 if HAVE_MP_TABLE object mptable.o end
  15 if HAVE_PIRQ_TABLE object irq_tables.o end
  16 #object reset.o
  17
  18 if CONFIG_USE_INIT
  19
  20 makerule ./auto.o
  21         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  22         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  23 end
  24
  25 else
  26
  27 makerule ./auto.inc
  28         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  29         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  30         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  31         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  32 end
  33
  34 end
  35
  36 ##
  37 ## Build our 16 bit and 32 bit coreboot entry code
  38 ##
  39 if USE_FALLBACK_IMAGE
  40         mainboardinit cpu/x86/16bit/entry16.inc
  41         ldscript /cpu/x86/16bit/entry16.lds
  42 end
  43
  44 mainboardinit cpu/x86/32bit/entry32.inc
  45
  46         if CONFIG_USE_INIT
  47                 ldscript /cpu/x86/32bit/entry32.lds
  48         end
  49
  50         if CONFIG_USE_INIT
  51                 ldscript      /cpu/amd/car/cache_as_ram.lds
  52         end
  53
  54 ##
  55 ## Build our reset vector (This is where coreboot is entered)
  56 ##
  57 if USE_FALLBACK_IMAGE
  58         mainboardinit cpu/x86/16bit/reset16.inc
  59         ldscript /cpu/x86/16bit/reset16.lds
  60 else
  61         mainboardinit cpu/x86/32bit/reset32.inc
  62         ldscript /cpu/x86/32bit/reset32.lds
  63 end
  64
  65 ##
  66 ## Include an id string (For safe flashing)
  67 ##
  68 mainboardinit arch/i386/lib/id.inc
  69 ldscript /arch/i386/lib/id.lds
  70
  71 ##
  72 ## Setup Cache-As-Ram
  73 ##
  74 mainboardinit cpu/amd/car/cache_as_ram.inc
  75
  76 ###
  77 ### This is the early phase of coreboot startup
  78 ### Things are delicate and we test to see if we should
  79 ### failover to another image.
  80 ###
  81 if USE_FALLBACK_IMAGE
  82        ldscript /arch/i386/lib/failover.lds
  83 end
  84
  85 ###
  86 ### O.k. We aren't just an intermediary anymore!
  87 ###
  88
  89 ##
  90 ## Setup RAM
  91 ##
  92 if CONFIG_USE_INIT
  93 initobject auto.o
  94 else
  95 mainboardinit ./auto.inc
  96 end
  97
  98 ##
  99 ## Include the secondary Configuration files
 100 ##
 101 config chip.h
 102
 103
 104 chip northbridge/amd/amdk8/root_complex
 105         device pci_domain 0 on
 106                 chip northbridge/amd/amdk8
 107                         device pci 18.0 on end # LDT 0
 108                         device pci 18.0 on     # LDT 1
 109                                 chip southbridge/amd/amd8131
 110                                         device pci 0.0 on end
 111                                         device pci 0.1 on end
 112                                         device pci 1.0 on end
 113                                         device pci 1.1 on end
 114                                 end
 115                                 chip southbridge/amd/amd8111
 116                                         device pci 0.0 on
 117                                                 device pci 0.0 on end
 118                                                 device pci 0.1 on end
 119                                                 device pci 0.2 on end
 120                                                 device pci 1.0 off end
 121                                         end
 122                                         device pci 1.0 on
 123                                                 chip superio/nsc/pc87366
 124                                                         device  pnp 2e.0 off  # Floppy
 125                                                                  io 0x60 = 0x3f0
 126                                                                 irq 0x70 = 6
 127                                                                 drq 0x74 = 2
 128                                                         end
 129                                                         device pnp 2e.1 off  # Parallel Port
 130                                                                  io 0x60 = 0x378
 131                                                                 irq 0x70 = 7
 132                                                         end
 133                                                         device pnp 2e.2 off # Com 2
 134                                                                  io 0x60 = 0x2f8
 135                                                                 irq 0x70 = 3
 136                                                         end
 137                                                         device pnp 2e.3 on  # Com 1
 138                                                                  io 0x60 = 0x3f8
 139                                                                 irq 0x70 = 4
 140                                                         end
 141                                                         device pnp 2e.4 off end # SWC
 142                                                         device pnp 2e.5 off end # Mouse
 143                                                         device pnp 2e.6 on  # Keyboard
 144                                                                  io 0x60 = 0x60
 145                                                                  io 0x62 = 0x64
 146                                                                 irq 0x70 = 1
 147                                                         end
 148                                                         device pnp 2e.7 off end # GPIO
 149                                                         device pnp 2e.8 off end # ACB
 150                                                         device pnp 2e.9 off end # FSCM
 151                                                         device pnp 2e.a off end # WDT
 152                                                 end
 153                                         end
 154                                         device pci 1.1 on end
 155                                         device pci 1.2 on end
 156                                         device pci 1.3 on end
 157                                         device pci 1.5 off end
 158                                         device pci 1.6 off end
 159                                 end
 160                         end #  device pci 18.0
 161                         device pci 18.0 on end # LDT2
 162                         device pci 18.1 on end
 163                         device pci 18.2 on end
 164                         device pci 18.3 on end
 165                 end
 166                 chip northbridge/amd/amdk8
 167                         device pci 19.0 on end
 168                         device pci 19.0 on end
 169                         device pci 19.0 on end
 170                         device pci 19.1 on end
 171                         device pci 19.2 on end
 172                         device pci 19.3 on end
 173                 end
 174         end
 175         device apic_cluster 0 on
 176                 chip cpu/amd/socket_940
 177                         device apic 0 on end
 178                 end
 179                 chip cpu/amd/socket_940
 180                         device apic 1 on end
 181                 end
 182         end
 183 end
 184