src/mainboard/hp/dl165_g6_fam10/bootblock.c

   1 #include <device/pnp_def.h>
   2
   3 #define SCH4307_CONFIG_PORT     0x162e
   4 static inline void shc4307_enter_ext_func_mode(device_t dev)
   5 {
   6         unsigned port = dev >> 8;
   7         outb(0x55, port);
   8 }
   9
  10 static inline void shc4307_exit_ext_func_mode(device_t dev)
  11 {
  12         unsigned port = dev >> 8;
  13         outb(0xaa, port);
  14 }
  15
  16 #define CMOS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x6)
  17 #define KBD_DEV  PNP_DEV(SCH4307_CONFIG_PORT, 0x7)
  18 #define DBG_DEV  PNP_DEV(SCH4307_CONFIG_PORT, 0x3)
  19 #define REGS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0xa)
  20
  21 void shc4307_init(void)
  22 {
  23         shc4307_enter_ext_func_mode(CMOS_DEV);
  24         pnp_set_logical_device(CMOS_DEV); /* CMOS/RTC */
  25         pnp_set_iobase(CMOS_DEV, PNP_IDX_IO0, 0x70);
  26         pnp_set_iobase(CMOS_DEV, PNP_IDX_IO1, 0x72);
  27         pnp_set_irq(CMOS_DEV, PNP_IDX_IRQ0, 8);
  28         /* pnp_set_enable(CMOS_DEV, 3); */
  29         pnp_write_config(CMOS_DEV, 0x30, 3);
  30
  31         pnp_set_logical_device(KBD_DEV); /* Keyboard */
  32         pnp_set_irq(KBD_DEV, PNP_IDX_IRQ0, 1);
  33         pnp_set_enable(KBD_DEV, 1);
  34
  35         pnp_set_logical_device(DBG_DEV); /* Debug */
  36         pnp_set_iobase(DBG_DEV, PNP_IDX_IO0, 0x80);
  37         pnp_set_enable(DBG_DEV, 1);
  38
  39         pnp_set_logical_device(REGS_DEV);
  40         pnp_set_iobase(REGS_DEV, PNP_IDX_IO0, 0x600);
  41         pnp_set_enable(REGS_DEV, 1);
  42
  43         shc4307_exit_ext_func_mode(CMOS_DEV);
  44 }
  45
  46 static void bootblock_southbridge_init(void) {
  47         shc4307_init();
  48 }