Set default ROM sizes per-board to match the ROM chip that came
[coreboot.git] / src / mainboard / hp / dl145_g3 / Kconfig
1 config BOARD_HP_DL145_G3
2         bool "DL145-G3"
3         select ARCH_X86
4         select CPU_AMD_K8
5         select CPU_AMD_SOCKET_F
6         select NORTHBRIDGE_AMD_AMDK8
7         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
8         select SOUTHBRIDGE_BROADCOM_BCM21000
9         select SOUTHBRIDGE_BROADCOM_BCM5785
10         select SUPERIO_NSC_PC87417
11         select HAVE_PIRQ_TABLE
12         select HAVE_MP_TABLE
13         select USE_PRINTK_IN_CAR
14         select USE_DCACHE_RAM
15         select HAVE_HARD_RESET
16         select IOAPIC
17         select BOARD_ROMSIZE_KB_512
18
19 config MAINBOARD_DIR
20         string
21         default hp/dl145_g3
22         depends on BOARD_HP_DL145_G3
23
24 config DCACHE_RAM_BASE
25         hex
26         default 0xcc000
27         depends on BOARD_HP_DL145_G3
28
29 config DCACHE_RAM_SIZE
30         hex
31         default 0x04000
32         depends on BOARD_HP_DL145_G3
33
34 config DCACHE_RAM_GLOBAL_VAR_SIZE
35         hex
36         default 0x01000
37         depends on BOARD_HP_DL145_G3
38
39 config APIC_ID_OFFSET
40         hex
41         default 0x10
42         depends on BOARD_HP_DL145_G3
43
44 config SB_HT_CHAIN_ON_BUS0
45         int
46         default 2
47         depends on BOARD_HP_DL145_G3
48
49 config SB_HT_CHAIN_UNITID_OFFSET_ONLY
50         bool
51         default n
52         depends on BOARD_HP_DL145_G3
53
54 config LB_CKS_RANGE_END
55         int
56         default 122
57         depends on BOARD_HP_DL145_G3
58
59 config LB_CKS_LOC
60         int
61         default 123
62         depends on BOARD_HP_DL145_G3
63
64 config MAINBOARD_PART_NUMBER
65         string
66         default "DL145G3"
67         depends on BOARD_HP_DL145_G3
68
69 config HW_MEM_HOLE_SIZEK
70         hex
71         default 0x100000
72         depends on BOARD_HP_DL145_G3
73
74 config MAX_CPUS
75         int
76         default 4
77         depends on BOARD_HP_DL145_G3
78
79 config MAX_PHYSICAL_CPUS
80         int
81         default 2
82         depends on BOARD_HP_DL145_G3
83
84 config HT_CHAIN_END_UNITID_BASE
85         hex
86         default 0x0
87         depends on BOARD_HP_DL145_G3
88
89 config HT_CHAIN_UNITID_BASE
90         hex
91         default 0x0
92         depends on BOARD_HP_DL145_G3
93
94 config USE_INIT
95         bool
96         default n
97         depends on BOARD_HP_DL145_G3
98
99 config SB_HT_CHAIN_ON_BUS0
100         int
101         default 2
102         depends on BOARD_HP_DL145_G3
103
104 config IRQ_SLOT_COUNT
105         int
106         default 15
107         depends on BOARD_HP_DL145_G3