2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
23 #include <arch/smp/mpspec.h>
24 #include <device/pci.h>
28 #include <cpu/amd/amdk8_sysconf.h>
29 extern unsigned char bus_isa;
30 extern unsigned char bus_mcp55[8]; //1
32 extern unsigned apicid_mcp55;
34 extern unsigned bus_type[256];
36 void *smp_write_config_table(void *v)
38 static const char sig[4] = "PCMP";
39 static const char oem[8] = "GIGABYTE";
40 static const char productid[12] = "M57SLI ";
41 struct mp_config_table *mc;
46 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
47 memset(mc, 0, sizeof(*mc));
49 memcpy(mc->mpc_signature, sig, sizeof(sig));
50 mc->mpc_length = sizeof(*mc); /* initially just the header */
52 mc->mpc_checksum = 0; /* not yet computed */
53 memcpy(mc->mpc_oem, oem, sizeof(oem));
54 memcpy(mc->mpc_productid, productid, sizeof(productid));
57 mc->mpc_entry_count = 0; /* No entries yet... */
58 mc->mpc_lapic = LAPIC_ADDR;
63 smp_write_processors(mc);
69 /* define bus and isa numbers */
70 for(j= 0; j < 256 ; j++) {
72 smp_write_bus(mc, j, "PCI ");
74 smp_write_bus(mc, bus_isa, "ISA ");
76 /*I/O APICs: APIC ID Version State Address*/
82 dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0));
84 res = find_resource(dev, PCI_BASE_ADDRESS_1);
86 smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
90 pci_write_config32(dev, 0x7c, dword);
93 pci_write_config32(dev, 0x80, dword);
96 pci_write_config32(dev, 0x84, dword);
101 /*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
102 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
104 /* ISA ints are edge-triggered, and usually originate from the ISA bus,
107 #define ISA_INT(intr, pin)\
108 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, (intr), apicid_mcp55, (pin))
122 /* PCI interrupts are level triggered, and are
123 * associated with a specific bus/device/function tuple.
125 #define PCI_INT(bus, dev, fn, pin) \
126 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\
127 bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin))
129 PCI_INT(0,sbdn+1,1, 10); /* SMBus */
130 PCI_INT(0,sbdn+2,0, 22); /* USB */
131 PCI_INT(0,sbdn+2,1, 23); /* USB */
132 PCI_INT(0,sbdn+6,1, 23); /* HD Audio */
133 PCI_INT(0,sbdn+5,0, 20); /* SATA */
134 PCI_INT(0,sbdn+5,1, 23); /* SATA */
135 PCI_INT(0,sbdn+5,2, 21); /* SATA */
137 PCI_INT(0,sbdn+8,0, 22); /* GBit Ether */
139 /* The PCIe slots, each on its own bus */
140 for(j=7; j>=2; j--) {
141 if(!bus_mcp55[j]) continue;
142 for(i=0;i<4;i++) { /* map all functions */
143 PCI_INT(j,0,i, 16+(1+j+i)%4);
147 /* On bus 1: the physical PCI bus slots... */
148 for(j=0; j<2; j++) /* on a Rev 1.x board, they are devs 7 and 8 */
149 for(i=0;i<4;i++) { /* map all functions */
150 PCI_INT(1,7+j,i, 16+(3+i+j)%4);
152 /* ... and OB FireWire */
153 PCI_INT(1,0x0a,0, 18);
155 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
156 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
157 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
158 /* There is no extension information... */
160 /* Compute the checksums */
161 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
162 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
163 printk_debug("Wrote the mp table end at: %p - %p\n",
164 mc, smp_next_mpe_entry(mc));
165 return smp_next_mpe_entry(mc);
168 unsigned long write_smp_table(unsigned long addr)
171 v = smp_write_floating_table(addr);
172 return (unsigned long)smp_write_config_table(v);