2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
23 #include <device/pci.h>
24 #include <device/pci_ids.h>
27 #if CONFIG_LOGICAL_CPUS==1
28 #include <cpu/amd/multicore.h>
31 #include <cpu/amd/amdk8_sysconf.h>
35 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
37 unsigned char bus_isa;
38 unsigned char bus_mcp55[8]; //1
39 unsigned apicid_mcp55;
43 { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
44 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
55 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
65 unsigned bus_type[256];
69 static unsigned get_bus_conf_done = 0;
71 void get_bus_conf(void)
80 if(get_bus_conf_done==1) return; //do it only once
82 get_bus_conf_done = 1;
84 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
85 for(i=0;i<sysconf.hc_possible_num; i++) {
86 sysconf.pci1234[i] = pci1234x[i];
87 sysconf.hcdn[i] = hcdnx[i];
92 sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
103 bus_type[0] = 1; //pci
105 bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
107 bus_type[bus_mcp55[0]] = 1;
110 dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0));
112 bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
113 bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
115 for(j=bus_mcp55[1];j<bus_mcp55[2]; j++) bus_type[j] = 1;
118 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
125 dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
127 bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
128 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
130 for(j=bus_mcp55[i];j<bus_isa; j++) bus_type[j] = 1;
133 printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
134 bus_isa = bus_mcp55[i-1]+1;
139 /*I/O APICs: APIC ID Version State Address*/
140 #if CONFIG_LOGICAL_CPUS==1
141 apicid_base = get_apicid_base(1);
143 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
145 apicid_mcp55 = apicid_base+0;