2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
5 * Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
6 * Copyright (C) 2009 Harald Gutmann <harald.gutmann@gmx.net>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 * ISA portions taken from QEMU acpi-dsdt.dsl.
26 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
28 #include "northbridge/amd/amdk8/util.asl"
30 /* For now only define 2 power states:
31 * - S0 which is fully on
32 * - S5 which is soft off
34 Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
35 Name (\_S5, Package () { 0x07, 0x00, 0x00, 0x00 })
37 /* Root of the bus hierarchy */
43 Name (_HID, EisaId ("PNP0A03"))
57 Method (_CRS, 0, NotSerialized)
59 Name (BUF0, ResourceTemplate ()
62 0x0CF8, // Address Range Minimum
63 0x0CF8, // Address Range Maximum
64 0x01, // Address Alignment
65 0x08, // Address Length
67 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
68 0x0000, // Address Space Granularity
69 0x0000, // Address Range Minimum
70 0x0CF7, // Address Range Maximum
71 0x0000, // Address Translation Offset
72 0x0CF8, // Address Length
75 /* Methods bellow use SSDT to get actual MMIO regs
76 The IO ports are from 0xd00, optionally an VGA,
77 otherwise the info from MMIO is used.
79 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
80 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
81 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
85 /* PCI Routing Table */
86 Name (_PRT, Package () {
87 Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x0A }, /* 0x1 - 00:01.1 - IRQ 10 - SMBus */
88 Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x16 }, /* 0x2 - 00:02.0 - IRQ 22 - USB */
89 Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x17 }, /* 0x2 - 00:01.1 - IRQ 23 - USB */
90 Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x15 }, /* 0x4 - 00:04.0 - IRQ 21 - IDE */
91 Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x14 }, /* 0x5 - 00:05.0 - IRQ 20 - SATA */
92 Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x15 }, /* 0x5 - 00:05.1 - IRQ 21 - SATA */
93 Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x16 }, /* 0x5 - 00:05.2 - IRQ 22 - SATA */
94 Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x17 }, /* 0x6 - 00:06.1 - IRQ 23 - HD Audio */
95 Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 }, /* 0x8 - 00:08.0 - IRQ 20 - GBit Ethernet */
98 Device (PEBF) /* PCI-E Bridge F */
100 Name (_ADR, 0x000F0000)
103 Name (_PRT, Package () {
104 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 },
105 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 },
106 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 },
107 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
111 Device (PEBE) /* PCI-E Bridge E */
113 Name (_ADR, 0x000E0000)
116 Name (_PRT, Package () {
117 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x12 },
118 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
119 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
120 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x11 },
124 Device (PEBD) /* PCI-E Bridge D */
126 Name (_ADR, 0x000D0000)
129 Name (_PRT, Package () {
130 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x13 },
131 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x10 },
132 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x11 },
133 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x12 },
137 Device (PEBC) /* PCI-E Bridge C */
139 Name (_ADR, 0x000C0000)
142 Name (_PRT, Package () {
143 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
144 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
145 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
146 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 },
150 Device (PEBB) /* PCI-E Bridge B */
152 Name (_ADR, 0x000B0000)
155 Name (_PRT, Package () {
156 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 },
157 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 },
158 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 },
159 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
163 Device (PEBA) /* PCI-E Bridge A */
165 Name (_ADR, 0x000A0000)
168 Name (_PRT, Package () {
169 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x12 },
170 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
171 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
172 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x11 },
176 Device (PCID) /* PCI Device */
178 Name (_ADR, 0x00060000)
181 Name (_PRT, Package () {
182 Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x12 },
183 Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x13 },
184 Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x10 },
185 Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x11 },
186 Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x13 }, /* PCI slot 1 */
187 Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x10 },
188 Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x11 },
189 Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x12 },
190 Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x10 }, /* PCI slot 2 */
191 Package (0x04) { 0x0008FFFF, 0x01, 0x00, 0x11 },
192 Package (0x04) { 0x0008FFFF, 0x02, 0x00, 0x12 },
193 Package (0x04) { 0x0008FFFF, 0x03, 0x00, 0x13 },
194 Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x11 },
195 Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x12 },
196 Package (0x04) { 0x0009FFFF, 0x02, 0x00, 0x13 },
197 Package (0x04) { 0x0009FFFF, 0x03, 0x00, 0x10 },
198 Package (0x04) { 0x000AFFFF, 0x00, 0x00, 0x12 }, /* FireWire */
199 Package (0x04) { 0x000AFFFF, 0x01, 0x00, 0x13 },
200 Package (0x04) { 0x000AFFFF, 0x02, 0x00, 0x10 },
201 Package (0x04) { 0x000AFFFF, 0x03, 0x00, 0x11 },
207 Name (_ADR, 0x000010000)
209 /* PS/2 keyboard (seems to be important for WinXP install) */
212 Name (_HID, EisaId ("PNP0303"))
213 Method (_STA, 0, NotSerialized)
217 Method (_CRS, 0, NotSerialized)
219 Name (TMP0, ResourceTemplate () {
220 IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
221 IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
231 Name (_HID, EisaId ("PNP0F13"))
232 Method (_STA, 0, NotSerialized)
236 Method (_CRS, 0, NotSerialized)
238 Name (TMP1, ResourceTemplate () {
239 IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
240 IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
247 /* PS/2 floppy controller */
250 Name (_HID, EisaId ("PNP0700"))
251 Method (_STA, 0, NotSerialized)
255 Method (_CRS, 0, NotSerialized)
257 Name (BUF0, ResourceTemplate () {
258 IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x06)
259 IO (Decode16, 0x03F7, 0x03F7, 0x01, 0x01)
261 DMA (Compatibility, NotBusMaster, Transfer8) {2}
269 Name (_HID, EisaId ("PNP0400"))
270 Method (_STA, 0, NotSerialized)
274 Method (_CRS, 0, NotSerialized)
276 Name (BUF1, ResourceTemplate () {
277 IO (Decode16, 0x0378, 0x0378, 0x01, 0x08)
283 /* Parallel Port ECP */
286 Name (_HID, EisaId ("PNP0401"))
287 Method (_STA, 0, NotSerialized)
291 Method (_CRS, 0, NotSerialized)
293 Name (BUF1, ResourceTemplate () {
294 IO (Decode16, 0x0378, 0x0378, 0x01, 0x04)
295 IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
297 DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}