2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
6 * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
7 * Written by Morgan Tsai <my_tsai@sis.com> for SiS.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 #include <console/console.h>
25 #include <device/pci.h>
26 #include <device/pci_ids.h>
29 #if CONFIG_LOGICAL_CPUS==1
30 #include <cpu/amd/dualcore.h>
33 #include <cpu/amd/amdk8_sysconf.h>
37 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
39 unsigned char bus_isa;
40 unsigned char bus_sis966[8]; //1
41 unsigned apicid_sis966;
45 { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
46 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
57 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
67 unsigned bus_type[256];
69 extern void get_sblk_pci1234(void);
71 static unsigned get_bus_conf_done = 0;
73 void get_bus_conf(void)
82 if(get_bus_conf_done==1) return; //do it only once
84 get_bus_conf_done = 1;
86 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
87 for(i=0;i<sysconf.hc_possible_num; i++) {
88 sysconf.pci1234[i] = pci1234x[i];
89 sysconf.hcdn[i] = hcdnx[i];
94 sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
101 for(i=0;i<256; i++) {
105 bus_type[0] = 1; //pci
107 bus_sis966[0] = (sysconf.pci1234[0] >> 16) & 0xff;
109 bus_type[bus_sis966[0]] = 1;
112 dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x06,0));
114 bus_sis966[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
115 bus_sis966[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
117 for(j=bus_sis966[1];j<bus_sis966[2]; j++) bus_type[j] = 1;
120 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
127 dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
129 bus_sis966[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
130 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
132 for(j=bus_sis966[i];j<bus_isa; j++) bus_type[j] = 1;
135 printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_sis966[0], sbdn + 0x0a + i - 2 );
136 bus_isa = bus_sis966[i-1]+1;
141 /*I/O APICs: APIC ID Version State Address*/
142 #if CONFIG_LOGICAL_CPUS==1
143 apicid_base = get_apicid_base(1);
145 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
147 apicid_sis966 = apicid_base+0;