3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
10 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
11 uses CONFIG_PRECOMPRESSED_PAYLOAD
12 uses CONFIG_ROM_PAYLOAD
16 uses MAINBOARD_PART_NUMBER
17 uses COREBOOT_EXTRA_VERSION
26 uses ROM_SECTION_OFFSET
27 uses CONFIG_ROM_PAYLOAD_START
38 uses CONFIG_PCI_ROM_RUN
39 uses CONFIG_PCI_OPTION_ROM_RUN_VM86
41 uses CONFIG_CONSOLE_SERIAL8250
45 uses DEFAULT_CONSOLE_LOGLEVEL
46 uses MAXIMUM_CONSOLE_LOGLEVEL
50 default CONFIG_CONSOLE_SERIAL8250=1
51 default DEFAULT_CONSOLE_LOGLEVEL=8
52 default MAXIMUM_CONSOLE_LOGLEVEL=8
55 ## ROM_SIZE is the size of boot ROM that this board will use.
56 default ROM_SIZE = 256*1024
63 ## Build code for the fallback boot
65 default HAVE_FALLBACK_BOOT=1
70 default HAVE_MP_TABLE=0
73 ## Build code to reset the motherboard from coreboot
75 default HAVE_HARD_RESET=0
78 ## Build code to export a programmable irq routing table
80 default HAVE_PIRQ_TABLE=1
81 default IRQ_SLOT_COUNT=6
84 ## Build code to export a CMOS option table
86 default HAVE_OPTION_TABLE=1
91 default CONFIG_PCI_ROM_RUN=1
92 default CONFIG_PCI_OPTION_ROM_RUN_VM86=1
95 ### coreboot layout values
98 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
99 default ROM_IMAGE_SIZE = 65536
100 default FALLBACK_SIZE = 131072
103 ## Use a small 8K stack
105 default STACK_SIZE=0x2000
108 ## Use a small 16K heap
110 default HEAP_SIZE=0x4000
113 ## Only use the option table in a normal image
115 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
116 default USE_OPTION_TABLE = 0
118 default _RAMBASE = 0x00004000
120 default CONFIG_ROM_PAYLOAD = 1
123 ## The default compiler
125 default CC="$(CROSS_COMPILE)gcc -m32"