3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
10 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
11 uses CONFIG_PRECOMPRESSED_PAYLOAD
12 uses CONFIG_ROM_PAYLOAD
16 uses MAINBOARD_PART_NUMBER
17 uses COREBOOT_EXTRA_VERSION
26 uses ROM_SECTION_OFFSET
27 uses CONFIG_ROM_PAYLOAD_START
39 uses CONFIG_PCI_ROM_RUN
40 uses CONFIG_PCI_OPTION_ROM_RUN_REALMODE
42 uses CONFIG_CONSOLE_SERIAL8250
47 uses CONFIG_USE_PRINTK_IN_CAR
49 uses DEFAULT_CONSOLE_LOGLEVEL
50 uses MAXIMUM_CONSOLE_LOGLEVEL
54 default CONFIG_CONSOLE_SERIAL8250=1
55 default DEFAULT_CONSOLE_LOGLEVEL=8
56 default MAXIMUM_CONSOLE_LOGLEVEL=8
59 ## ROM_SIZE is the size of boot ROM that this board will use.
60 default ROM_SIZE = 256*1024
67 ## Build code for the fallback boot
69 default HAVE_FALLBACK_BOOT=1
74 default HAVE_MP_TABLE=0
77 ## Build code to reset the motherboard from coreboot
79 default HAVE_HARD_RESET=0
82 ## Build code to export a programmable irq routing table
84 default HAVE_PIRQ_TABLE=1
85 default IRQ_SLOT_COUNT=6
87 default HAVE_HIGH_TABLES=1
90 ## Build code to export a CMOS option table
92 default HAVE_OPTION_TABLE=1
97 default CONFIG_PCI_ROM_RUN=1
98 default CONFIG_PCI_OPTION_ROM_RUN_REALMODE=1
101 ### coreboot layout values
104 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
105 default ROM_IMAGE_SIZE = 65536
106 default FALLBACK_SIZE = ROM_IMAGE_SIZE
109 ## Use a small 8K stack
111 default STACK_SIZE=0x2000
114 ## Use a small 16K heap
116 default HEAP_SIZE=0x4000
119 ## Only use the option table in a normal image
121 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
122 default USE_OPTION_TABLE = 0
124 default _RAMBASE = 0x00004000
126 default CONFIG_ROM_PAYLOAD = 1
129 ## The default compiler
131 default CC="$(CROSS_COMPILE)gcc -m32"
135 ## known-good settings for qemu
136 default DCACHE_RAM_BASE=0x8f000
137 default DCACHE_RAM_SIZE=0x1000