3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
10 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
11 uses CONFIG_PRECOMPRESSED_PAYLOAD
12 uses CONFIG_ROM_PAYLOAD
16 uses MAINBOARD_PART_NUMBER
17 uses COREBOOT_EXTRA_VERSION
26 uses ROM_SECTION_OFFSET
27 uses CONFIG_ROM_PAYLOAD_START
38 uses CONFIG_PCI_ROM_RUN
39 uses CONFIG_PCI_OPTION_ROM_RUN_VM86
41 uses CONFIG_CONSOLE_SERIAL8250
44 uses DEFAULT_CONSOLE_LOGLEVEL
45 uses MAXIMUM_CONSOLE_LOGLEVEL
49 default CONFIG_CONSOLE_SERIAL8250=1
50 default DEFAULT_CONSOLE_LOGLEVEL=8
51 default MAXIMUM_CONSOLE_LOGLEVEL=8
52 default CONFIG_ROMFS=0
54 ## ROM_SIZE is the size of boot ROM that this board will use.
55 default ROM_SIZE = 256*1024
62 ## Build code for the fallback boot
64 default HAVE_FALLBACK_BOOT=1
69 default HAVE_MP_TABLE=0
72 ## Build code to reset the motherboard from coreboot
74 default HAVE_HARD_RESET=0
77 ## Build code to export a programmable irq routing table
79 default HAVE_PIRQ_TABLE=1
80 default IRQ_SLOT_COUNT=6
83 ## Build code to export a CMOS option table
85 default HAVE_OPTION_TABLE=1
90 default CONFIG_PCI_ROM_RUN=1
91 default CONFIG_PCI_OPTION_ROM_RUN_VM86=1
94 ### coreboot layout values
97 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
98 default ROM_IMAGE_SIZE = 65536
99 default FALLBACK_SIZE = 131072
102 ## Use a small 8K stack
104 default STACK_SIZE=0x2000
107 ## Use a small 16K heap
109 default HEAP_SIZE=0x4000
112 ## Only use the option table in a normal image
114 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
115 default USE_OPTION_TABLE = 0
117 default _RAMBASE = 0x00004000
119 default CONFIG_ROM_PAYLOAD = 1
122 ## The default compiler
124 default CC="$(CROSS_COMPILE)gcc -m32"