3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
10 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
11 uses CONFIG_PRECOMPRESSED_PAYLOAD
12 uses CONFIG_ROM_PAYLOAD
16 uses MAINBOARD_PART_NUMBER
17 uses COREBOOT_EXTRA_VERSION
26 uses ROM_SECTION_OFFSET
27 uses CONFIG_ROM_PAYLOAD_START
39 uses CONFIG_PCI_ROM_RUN
40 uses CONFIG_PCI_OPTION_ROM_RUN_REALMODE
42 uses CONFIG_CONSOLE_SERIAL8250
46 uses DEFAULT_CONSOLE_LOGLEVEL
47 uses MAXIMUM_CONSOLE_LOGLEVEL
51 default CONFIG_CONSOLE_SERIAL8250=1
52 default DEFAULT_CONSOLE_LOGLEVEL=8
53 default MAXIMUM_CONSOLE_LOGLEVEL=8
56 ## ROM_SIZE is the size of boot ROM that this board will use.
57 default ROM_SIZE = 256*1024
64 ## Build code for the fallback boot
66 default HAVE_FALLBACK_BOOT=1
71 default HAVE_MP_TABLE=0
74 ## Build code to reset the motherboard from coreboot
76 default HAVE_HARD_RESET=0
79 ## Build code to export a programmable irq routing table
81 default HAVE_PIRQ_TABLE=1
82 default IRQ_SLOT_COUNT=6
84 default HAVE_HIGH_TABLES=1
87 ## Build code to export a CMOS option table
89 default HAVE_OPTION_TABLE=1
94 default CONFIG_PCI_ROM_RUN=1
95 default CONFIG_PCI_OPTION_ROM_RUN_REALMODE=1
98 ### coreboot layout values
101 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
102 default ROM_IMAGE_SIZE = 65536
103 default FALLBACK_SIZE = 131072
106 ## Use a small 8K stack
108 default STACK_SIZE=0x2000
111 ## Use a small 16K heap
113 default HEAP_SIZE=0x4000
116 ## Only use the option table in a normal image
118 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
119 default USE_OPTION_TABLE = 0
121 default _RAMBASE = 0x00004000
123 default CONFIG_ROM_PAYLOAD = 1
126 ## The default compiler
128 default CC="$(CROSS_COMPILE)gcc -m32"