4 #include <device/pci_def.h>
6 #include <device/pnp_def.h>
7 #include <arch/romcc_io.h>
9 #include "pc80/serial.c"
10 #include "arch/i386/lib/console.c"
11 #include "ram/ramtest.c"
12 //#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
13 #include "superio/NSC/pc97317/pc97317_early_serial.c"
14 //#include "northbridge/intel/i440bx/raminit.h"
15 #include "cpu/x86/bist.h"
17 #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
20 //#include "lib/delay.c"
22 #include "northbridge/amd/gx1/raminit.c"
24 static void main(unsigned long bist)
26 pc97317_enable_serial(SERIAL_DEV, TTYS0_BASE);
30 /* Halt if there was a built in self test failure */
31 report_bist_failure(bist);
35 /* Check all of memory */
37 ram_check(0x00000000, msr.lo);
43 /* Check 16MB of memory @ 0*/
44 { 0x00000000, 0x01000000 },
46 /* Check 16MB of memory @ 2GB */
47 { 0x80000000, 0x81000000 },
51 for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) {
52 ram_check(check_addrs[i].lo, check_addrs[i].hi);