2 //#include "arch/romcc_io.h"
5 typedef unsigned device_t;
7 #define PCI_DEV(BUS, DEV, FN) ( \
8 (((BUS) & 0xFF) << 16) | \
9 (((DEV) & 0x1f) << 11) | \
12 static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
16 outl(0x80000000 | (addr & ~3), 0xCF8);
17 outb(value, 0xCFC + (addr & 3));
20 static void pci_write_config32(device_t dev, unsigned where, unsigned value)
24 outl(0x80000000 | (addr & ~3), 0xCF8);
28 static unsigned pci_read_config32(device_t dev, unsigned where)
32 outl(0x80000000 | (addr & ~3), 0xCF8);
36 #include "../../../northbridge/amd/amdk8/reset_test.c"
41 pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1);