3 #include <device/pci_def.h>
4 #include <device/pci_ids.h>
6 #include <arch/romcc_io.h>
7 #include <cpu/x86/lapic.h>
8 #include "pc80/serial.c"
9 #include "arch/i386/lib/console.c"
10 #include "pc80/mc146818rtc_early.c"
11 #include "cpu/x86/lapic/boot_cpu.c"
12 #include "northbridge/intel/e7520/memory_initialized.c"
14 static unsigned long main(unsigned long bist)
16 /* skip all this nonsense as we are not doing fallback yet */
18 /* Did just the cpu reset? */
19 if (memory_initialized()) {
20 if (last_boot_normal()) {
27 /* This is the primary cpu how should I boot? */
28 else if (do_normal_boot()) {
35 asm volatile ("jmp __normal_image"
37 : "a" (bist) /* inputs */
41 asm volatile ("jmp __cpu_reset"
43 : "a"(bist) /* inputs */