1 #define SMBUS_MEM_DEVICE_START 0x50
2 #define SMBUS_MEM_DEVICE_END 0x57
3 #define SMBUS_MEM_DEVICE_INC 1
5 static void print_reg(unsigned char index)
12 print_debug_hex8(index);
14 print_debug_hex8(data);
19 static void xbus_en(void)
21 /* select the XBUS function in the SIO */
29 static void setup_func(unsigned char func)
31 /* select the function in the SIO */
34 /* print out the regs */
47 static void siodump(void)
52 print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n");
53 for (i=0x10; i<=0x2d; i++) {
54 print_reg((unsigned char)i);
57 print_debug("\r\n*** XBUS REGISTERS ***\r\n");
59 for (i=0xf0; i<=0xff; i++) {
60 print_reg((unsigned char)i);
63 print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n");
67 print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n");
72 print_debug("\r\n*** GPIO REGISTERS ***\r\n");
74 for (i=0xf0; i<=0xf8; i++) {
75 print_reg((unsigned char)i);
77 print_debug("\r\n*** GPIO VALUES ***\r\n");
79 print_debug("\r\nGPDO 4: 0x");
80 print_debug_hex8(data);
82 print_debug("\r\nGPDI 4: 0x");
83 print_debug_hex8(data);
88 print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n");
92 print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n");
97 print_debug("\r\n*** RTC REGISTERS ***\r\n");
107 print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n");
114 static void print_debug_pci_dev(unsigned dev)
116 print_debug("PCI: ");
117 print_debug_hex8((dev >> 16) & 0xff);
118 print_debug_char(':');
119 print_debug_hex8((dev >> 11) & 0x1f);
120 print_debug_char('.');
121 print_debug_hex8((dev >> 8) & 7);
124 static void print_pci_devices(void)
127 for(dev = PCI_DEV(0, 0, 0);
128 dev <= PCI_DEV(0, 0x1f, 0x7);
129 dev += PCI_DEV(0,0,1)) {
131 id = pci_read_config32(dev, PCI_VENDOR_ID);
132 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
133 (((id >> 16) & 0xffff) == 0xffff) ||
134 (((id >> 16) & 0xffff) == 0x0000)) {
137 print_debug_pci_dev(dev);
142 static void dump_pci_device(unsigned dev)
145 print_debug_pci_dev(dev);
148 for(i = 0; i <= 255; i++) {
150 if ((i & 0x0f) == 0) {
152 print_debug_char(':');
154 val = pci_read_config8(dev, i);
155 print_debug_char(' ');
156 print_debug_hex8(val);
157 if ((i & 0x0f) == 0x0f) {
163 static void dump_bar14(unsigned dev)
168 print_debug("BAR 14 Dump\r\n");
170 bar = pci_read_config32(dev, 0x14);
171 for(i = 0; i <= 0x300; i+=4) {
174 if ((i & 0x0f) == 0) {
176 print_debug_char(':');
178 val = pci_read_config8(dev, i);
182 print_debug_hex16(i);
183 print_debug_char(' ');
185 print_debug_hex32(read32(bar + i));
186 print_debug_char(' ');
191 static void dump_pci_devices(void)
194 for(dev = PCI_DEV(0, 0, 0);
195 dev <= PCI_DEV(0, 0x1f, 0x7);
196 dev += PCI_DEV(0,0,1)) {
198 id = pci_read_config32(dev, PCI_VENDOR_ID);
199 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
200 (((id >> 16) & 0xffff) == 0xffff) ||
201 (((id >> 16) & 0xffff) == 0x0000)) {
204 dump_pci_device(dev);
208 void dump_spd_registers(void)
211 device = SMBUS_MEM_DEVICE_START;
212 while(device <= SMBUS_MEM_DEVICE_END) {
216 print_debug("dimm ");
217 print_debug_hex8(device);
219 for(i = 0; (i < 256) ; i++) {
226 status = smbus_read_byte(device, i);
228 print_debug("bad device: ");
229 print_debug_hex8(-status);
233 print_debug_hex8(status);
234 print_debug_char(' ');
236 device += SMBUS_MEM_DEVICE_INC;
241 void show_dram_slots(void)
244 device = SMBUS_MEM_DEVICE_START;
245 while(device <= SMBUS_MEM_DEVICE_END) {
249 print_debug("dimm ");
250 print_debug_hex8(device);
252 status = smbus_read_byte(device, 0);
254 print_debug("bad device: ");
256 print_debug("present: ");
258 print_debug_hex8(status);
260 device += SMBUS_MEM_DEVICE_INC;
265 void dump_ipmi_registers(void)
269 while(device <= 0x42) {
273 print_debug("ipmi ");
274 print_debug_hex8(device);
276 for(i = 0; (i < 8) ; i++) {
278 status = smbus_read_byte(device, 2);
280 print_debug("bad device: ");
281 print_debug_hex8(-status);
285 print_debug_hex8(status);
286 print_debug_char(' ');
288 device += SMBUS_MEM_DEVICE_INC;