src/mainboard/broadcom/blast/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FALLBACK_IMAGE
   6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
   8 else
   9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
  10         default ROM_SECTION_OFFSET = 0
  11 end
  12
  13 ##
  14 ## Compute the start location and size size of
  15 ## The linuxBIOS bootloader.
  16 ##
  17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  18 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  19
  20 ##
  21 ## Compute where this copy of linuxBIOS will start in the boot rom
  22 ##
  23 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
  24
  25 ##
  26 ## Compute a range of ROM that can cached to speed up linuxBIOS,
  27 ## execution speed.
  28 ##
  29 ## XIP_ROM_SIZE must be a power of 2.
  30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  31 ##
  32 default XIP_ROM_SIZE=65536
  33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
  34
  35 arch i386 end
  36
  37 ##
  38 ## Build the objects we have code for in this directory.
  39 ##
  40
  41 driver mainboard.o
  42
  43 #dir /drivers/si/3114
  44
  45 if HAVE_MP_TABLE object mptable.o end
  46 if HAVE_PIRQ_TABLE
  47         object get_bus_conf.o
  48         object irq_tables.o
  49 end
  50
  51 #object reset.o
  52
  53 if USE_DCACHE_RAM
  54
  55         if CONFIG_USE_INIT
  56
  57                 makerule ./cache_as_ram_auto.o
  58                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  59                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
  60                 end
  61
  62         else
  63
  64                 makerule ./cache_as_ram_auto.inc
  65                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  66                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
  67                         action "perl -e 's/.rodata/.rom.data/g' -pi $@"
  68                         action "perl -e 's/.text/.section .rom.text/g' -pi $@"
  69                 end
  70
  71         end
  72
  73 end
  74 ##
  75 ## Build our 16 bit and 32 bit linuxBIOS entry code
  76 ##
  77 mainboardinit cpu/x86/16bit/entry16.inc
  78 mainboardinit cpu/x86/32bit/entry32.inc
  79 ldscript /cpu/x86/16bit/entry16.lds
  80 if USE_DCACHE_RAM
  81         if CONFIG_USE_INIT
  82                 ldscript /cpu/x86/32bit/entry32.lds
  83         end
  84
  85         if CONFIG_USE_INIT
  86                 ldscript      /cpu/amd/car/cache_as_ram.lds
  87         end
  88 end
  89
  90 ##
  91 ## Build our reset vector (This is where linuxBIOS is entered)
  92 ##
  93 if USE_FALLBACK_IMAGE
  94         mainboardinit cpu/x86/16bit/reset16.inc
  95         ldscript /cpu/x86/16bit/reset16.lds
  96 else
  97         mainboardinit cpu/x86/32bit/reset32.inc
  98         ldscript /cpu/x86/32bit/reset32.lds
  99 end
 100
 101 ##
 102 ## Include an id string (For safe flashing)
 103 ##
 104 mainboardinit arch/i386/lib/id.inc
 105 ldscript /arch/i386/lib/id.lds
 106
 107 if USE_DCACHE_RAM
 108         ##
 109         ## Setup Cache-As-Ram
 110         ##
 111         mainboardinit cpu/amd/car/cache_as_ram.inc
 112 end
 113
 114 ###
 115 ### This is the early phase of linuxBIOS startup
 116 ### Things are delicate and we test to see if we should
 117 ### failover to another image.
 118 ###
 119 if USE_FALLBACK_IMAGE
 120         if USE_DCACHE_RAM
 121                ldscript /arch/i386/lib/failover.lds
 122         else
 123                ldscript /arch/i386/lib/failover.lds
 124                 mainboardinit ./failover.inc
 125         end
 126 end
 127
 128 ###
 129 ### O.k. We aren't just an intermediary anymore!
 130 ###
 131
 132 ##
 133 ## Setup RAM
 134 ##
 135 if USE_DCACHE_RAM
 136
 137         if CONFIG_USE_INIT
 138                 initobject cache_as_ram_auto.o
 139         else
 140                 mainboardinit ./cache_as_ram_auto.inc
 141         end
 142
 143 end
 144
 145 ##
 146 ## Include the secondary Configuration files
 147 ##
 148 if CONFIG_CHIP_NAME
 149         config chip.h
 150 end
 151
 152 # sample config for broadcom/blast
 153 chip northbridge/amd/amdk8/root_complex
 154         device apic_cluster 0 on
 155                 chip cpu/amd/socket_940
 156                         device apic 0 on end
 157                 end
 158         end
 159         device pci_domain 0 on
 160                 chip northbridge/amd/amdk8
 161                         device pci 18.0 on #  northbridge
 162                               #  devices on link 0
 163                                 chip southbridge/broadcom/bcm5780 # HT2000
 164                                         device pci 0.0 on end   # PXB 1 0x0130
 165                                         device pci 1.0 on       # PXB 2 0x0130
 166                                                 device pci 4.0 on end # GB E 0x1668 vid = 0x14e4
 167                                                 device pci 4.1 on end # GB E 0x1669 vid = 0x14e4
 168                                         end
 169                                         device pci 2.0 on end # PCI E 1  #0x0132
 170                                         device pci 3.0 on end # PCI E 2
 171                                         device pci 4.0 on end # PCI E 3
 172                                         device pci 5.0 on end # PCI E 4
 173                                 end
 174                                 chip southbridge/broadcom/bcm5785 # HT1000
 175                                         device pci 0.0 on  # HT PXB  0x0036
 176                                                 device pci d.0 on end # PPBX 0x0104
 177                                                 device pci e.0 on end # SATA 0x024a
 178                                         end
 179                                         device pci 1.0 on # Legacy  pci main  0x0205
 180                                                 chip drivers/i2c/i2cmux2 # pca9554 smbus mux
 181                                                         device i2c 71 on end #0 pca9554 0
 182                                                         device i2c 71 on end #0 pca9554 1
 183                                                         device i2c 71 on end #0 pca9554 2
 184                                                         device i2c 71 on end #0 pca9554 3
 185                                                         device i2c 71 on end #0 pca9554 4
 186                                                         device i2c 71 on end #0 pca9554 5
 187                                                         device i2c 71 on #0 pca9554 6
 188                                                                 chip drivers/generic/generic #dimm 0-0-0
 189                                                                         device i2c 50 on end
 190                                                                 end
 191                                                                 chip drivers/generic/generic #dimm 0-0-1
 192                                                                         device i2c 51 on end
 193                                                                 end
 194                                                                 chip drivers/generic/generic #dimm 0-1-0
 195                                                                         device i2c 52 on end
 196                                                                 end
 197                                                                 chip drivers/generic/generic #dimm 0-1-1
 198                                                                         device i2c 53 on end
 199                                                                 end
 200                                                         end
 201                                                         device i2c 71 on #1 pca9554 7
 202                                                                 chip drivers/generic/generic #dimm 1-0-0
 203                                                                         device i2c 50 on end
 204                                                                 end
 205                                                                 chip drivers/generic/generic #dimm 1-0-1
 206                                                                         device i2c 51 on end
 207                                                                 end
 208                                                                 chip drivers/generic/generic #dimm 1-1-0
 209                                                                         device i2c 52 on end
 210                                                                 end
 211                                                                 chip drivers/generic/generic #dimm 1-1-1
 212                                                                         device i2c 53 on end
 213                                                                 end
 214                                                         end
 215                                                 end
 216
 217                                         end
 218                                         device pci 1.1 on end # IDE        0x0214
 219                                         device pci 1.2 on     # LPC        0x0234
 220                                                 chip superio/NSC/pc87417
 221                                                         device  pnp 2e.0 off  # Floppy
 222                                                                  io 0x60 = 0x3f0
 223                                                                 irq 0x70 = 6
 224                                                                 drq 0x74 = 2
 225                                                         end
 226                                                         device pnp 2e.1 off  # Parallel Port
 227                                                                  io 0x60 = 0x378
 228                                                                 irq 0x70 = 7
 229                                                         end
 230                                                         device pnp 2e.2 off # Com 2
 231                                                                  io 0x60 = 0x2f8
 232                                                                 irq 0x70 = 3
 233                                                         end
 234                                                         device pnp 2e.3 on  # Com 1
 235                                                                  io 0x60 = 0x3f8
 236                                                                 irq 0x70 = 4
 237                                                         end
 238                                                         device pnp 2e.4 off end # SWC
 239                                                         device pnp 2e.5 off end # Mouse
 240                                                         device pnp 2e.6 on  # Keyboard
 241                                                                  io 0x60 = 0x60
 242                                                                  io 0x62 = 0x64
 243                                                                 irq 0x70 = 1
 244                                                         end
 245                                                         device pnp 2e.7 off end # GPIO
 246                                                         device pnp 2e.f off end # XBUS
 247                                                         device pnp 2e.10 on #RTC
 248                                                                  io 0x60 = 0x70
 249                                                                  io 0x62 = 0x72
 250                                                         end
 251                                                 end
 252                                         end
 253                                         device pci 1.3 on end # WDTimer    0x0238
 254                                         device pci 1.4 on end # XIOAPIC0   0x0235
 255                                         device pci 1.5 on end # XIOAPIC1
 256                                         device pci 1.6 on end # XIOAPIC2
 257                                         device pci 2.0 on end # USB        0x0223
 258                                         device pci 2.1 on end # USB
 259                                         device pci 2.2 on end # USB
 260                                         #when HT_CHAIN_END_UNITID_BASE (0,1) < HT_CHAIN_UNITID_BASE (6,,,,),
 261                                         chip drivers/pci/onboard
 262                                               device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
 263                                                                     # if HT_CHAIN_END_UNITID_BASE=0, it is 5, if HT_CHAIN_END_UNITID_BASE=1, it is 4
 264                                               register "rom_address" = "0xfff80000"
 265                                         end
 266                                 end
 267                                         #when HT_CHAIN_END_UNITID_BASE > HT_CHAIN_UNITID_BASE (6, ,,,,)
 268 #                                        chip drivers/pci/onboard
 269 #                                              device pci 0.0 on end # fake, will be disabled
 270 #                                        end
 271 #                                        chip drivers/pci/onboard
 272 #                                              device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
 273 #                                              register "rom_address" = "0xfff80000"
 274 #                                        end
 275
 276
 277                         end #  device pci 18.0
 278
 279                         device pci 18.0 on end
 280                         device pci 18.0 on end
 281                         device pci 18.1 on end
 282                         device pci 18.2 on end
 283                         device pci 18.3 on end
 284                 end
 285
 286
 287         end #pci_domain
 288 #        chip drivers/generic/debug
 289 #                device pnp 0.0 off end # chip name
 290 #                device pnp 0.1 on end # pci_regs_all
 291 #                device pnp 0.2 off end # mem
 292 #                device pnp 0.3 off end # cpuid
 293 #                device pnp 0.4 off end # smbus_regs_all
 294 #                device pnp 0.5 off end # dual core msr
 295 #                device pnp 0.6 off end # cache size
 296 #                device pnp 0.7 off end # tsc
 297 #       end
 298
 299 end
 300