Add bifferboard

[coreboot.git] / src / mainboard / bifferos / bifferboard / devicetree.cb

chip northbridge/rdc/r8610
        device pci_domain 0 on
                device pci 0.0 on end
                chip southbridge/rdc/r8610              # Southbridge
                        device pci 7.0 on end                   # SB
                end
        end
end