2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <device/pci_def.h>
24 #include <device/pnp_def.h>
25 #include <arch/romcc_io.h>
28 #include "pc80/serial.c"
29 #include <console/console.h>
30 #include "lib/ramtest.c"
31 #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
32 #include "northbridge/intel/i82810/raminit.h"
33 #include "cpu/x86/mtrr/earlymtrr.c"
34 #include "cpu/x86/bist.h"
36 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
38 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
39 #include "lib/debug.c"
40 #include "pc80/udelay_io.c"
41 #include "lib/delay.c"
42 #include "northbridge/intel/i82810/raminit.c"
43 #include "northbridge/intel/i82810/debug.c"
45 static void main(unsigned long bist)
50 lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
56 /* Halt if there was a built in self test failure. */
57 report_bist_failure(bist);
59 /* dump_spd_registers(); */
61 sdram_set_registers();
62 sdram_set_spd_registers();
66 /* ram_check(0, 640 * 1024); */