2 * This file is part of the coreboot project.
4 * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
5 * (C) Copyright 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
7 * ISA portions taken from QEMU acpi-dsdt.dsl.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License v2 as published by
11 * the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
25 Include ("../../../../src/northbridge/amd/amdk8/amdk8_util.asl")
27 /* For now only define 2 power states:
28 * - S0 which is fully on
29 * - S5 which is soft off
30 * Any others would involve declaring the wake up methods.
32 Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
33 Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
35 /* Root of the bus hierarchy */
41 Name (_HID, EisaId ("PNP0A03"))
55 Method (_CRS, 0, NotSerialized)
57 Name (BUF0, ResourceTemplate ()
60 0x0CF8, // Address Range Minimum
61 0x0CF8, // Address Range Maximum
62 0x01, // Address Alignment
63 0x08, // Address Length
65 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
66 0x0000, // Address Space Granularity
67 0x0000, // Address Range Minimum
68 0x0CF7, // Address Range Maximum
69 0x0000, // Address Translation Offset
70 0x0CF8, // Address Length
73 /* Methods bellow use SSDT to get actual MMIO regs
74 The IO ports are from 0xd00, optionally an VGA,
75 otherwise the info from MMIO is used.
77 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
78 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
79 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
83 /* PCI Routing Table */
84 Name (_PRT, Package () {
85 Package (0x04) { 0x000FFFFF, 0x01, 0x00, 0x15 }, /* 0xf SATA IRQ 21 */
86 Package (0x04) { 0x000FFFFF, 0x00, 0x00, 0x14 }, /* 0xf Native IDE IRQ 20 */
87 Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x15 }, /* USB routing */
88 Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x15 },
89 Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x15 },
90 Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x15 },
91 Package (0x04) { 0x0012FFFF, 0x00, 0x00, 0x17 }, /* LAN */
92 Package (0x04) { 0x0013FFFF, 0x00, 0x00, 0x14 }, /* PCIe bridge SB */
93 Package (0x04) { 0x0013FFFF, 0x02, 0x00, 0x16 }, /* PCIe bridge SB */
94 Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 }, /* AGP pridge */
95 Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 }, /* FIXME FIXME */
96 Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1B }, /* PCIE16 bridge IRQ27 */
97 Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B },
98 Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1B },
99 Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1B },
100 Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1F }, /* PCIE bridge IRQ31 */
101 Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x23 }, /* IRQ36 */
102 Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x27 }, /* IRQ39 */
103 Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x2B } /* IRQ43 */
108 Name (_ADR, 0x00020000)
111 Name (_PRT, Package () {
112 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x18 }, /* PCIE IRQ24-IRQ27 */
113 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x19 },
114 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1A },
115 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1B },
121 Name (_ADR, 0x00030000)
124 Name (_PRT, Package () {
125 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x1C }, /* PCIE IRQ28-IRQ31 */
126 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x1D },
127 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1E },
128 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1F },
134 Name (_ADR, 0x00130000)
137 Name (_PRT, Package () {
138 Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x11 }, /* PCIE audio */
139 Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 },
140 Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x11 },
141 Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x11 },
147 Name (_ADR, 0x00130001)
150 Name (_PRT, Package () {
151 Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x10 }, /* PCI slot */
152 Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x11 },
153 Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x12 },
154 Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x13 },
155 Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x11 }, /* PCI slot */
156 Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x12 },
157 Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x13 },
158 Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x10 },
162 Name (_ADR, 0x00110000)
164 /* PS/2 keyboard (seems to be important for WinXP install) */
167 Name (_HID, EisaId ("PNP0303"))
168 Method (_STA, 0, NotSerialized)
172 Method (_CRS, 0, NotSerialized)
174 Name (TMP, ResourceTemplate () {
175 IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
176 IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
186 Name (_HID, EisaId ("PNP0F13"))
187 Method (_STA, 0, NotSerialized)
191 Method (_CRS, 0, NotSerialized)
193 Name (TMP, ResourceTemplate () {
200 /* PS/2 floppy controller */
203 Name (_HID, EisaId ("PNP0700"))
204 Method (_STA, 0, NotSerialized)
208 Method (_CRS, 0, NotSerialized)
210 Name (BUF0, ResourceTemplate () {
211 IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
212 IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
214 DMA (Compatibility, NotBusMaster, Transfer8) {2}