2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
23 #include <device/pci.h>
24 #include <device/pci_ids.h>
27 #if CONFIG_LOGICAL_CPUS==1
28 #include <cpu/amd/multicore.h>
30 #include <cpu/amd/amdk8_sysconf.h>
33 /* Global variables for MB layouts (shared by irqtable/mptable/acpi_table). */
35 unsigned char bus_mcp55[8]; // 1
36 unsigned apicid_mcp55;
38 unsigned pci1234x[] = {
39 /* Here you only need to set value in pci1234 for HT-IO that could
40 * be installed or not. You may need to preset pci1234 for HTIO board,
41 * please refer to * src/northbridge/amd/amdk8/get_sblk_pci1234.c.
54 /* HT Chain device num, actually it is unit id base of every ht
55 * device in chain, assume every chain only have 4 ht device at most.
67 static unsigned get_bus_conf_done = 0;
69 void get_bus_conf(void)
71 unsigned int apicid_base, sbdn;
75 if (get_bus_conf_done == 1)
76 return; /* Do it only once. */
78 get_bus_conf_done = 1;
80 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
81 for (i = 0; i < sysconf.hc_possible_num; i++) {
82 sysconf.pci1234[i] = pci1234x[i];
83 sysconf.hcdn[i] = hcdnx[i];
88 sysconf.sbdn = (sysconf.hcdn[0] & 0xff); /* First byte of first chain */
91 for (i = 0; i < 8; i++)
94 bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
96 dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
98 bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
99 bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
102 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, "
103 "using defaults\n", sbdn + 0x06);
108 for (i = 2; i < 8; i++) {
109 dev = dev_find_slot(bus_mcp55[0],
110 PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
112 bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
115 #if CONFIG_LOGICAL_CPUS == 1
116 apicid_base = get_apicid_base(1);
118 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
120 apicid_mcp55 = apicid_base + 0;