2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
5 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * ISA portions taken from QEMU acpi-dsdt.dsl.
25 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
27 #include "northbridge/amd/amdk8/util.asl"
29 /* For now only define 2 power states:
30 * - S0 which is fully on
31 * - S5 which is soft off
32 * Any others would involve declaring the wake up methods.
34 Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
35 Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
37 /* Root of the bus hierarchy */
43 Name (_HID, EisaId ("PNP0A03"))
57 Method (_CRS, 0, NotSerialized)
59 Name (BUF0, ResourceTemplate ()
62 0x0CF8, // Address Range Minimum
63 0x0CF8, // Address Range Maximum
64 0x01, // Address Alignment
65 0x08, // Address Length
67 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
68 0x0000, // Address Space Granularity
69 0x0000, // Address Range Minimum
70 0x0CF7, // Address Range Maximum
71 0x0000, // Address Translation Offset
72 0x0CF8, // Address Length
75 /* Methods bellow use SSDT to get actual MMIO regs
76 The IO ports are from 0xd00, optionally an VGA,
77 otherwise the info from MMIO is used.
79 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
80 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
81 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
85 /* PCI Routing Table */
86 Name (_PRT, Package () {
87 Package (0x04) { 0x000BFFFF, 0x00, 0x00, 0x10 }, /* Slot 0xB */
88 Package (0x04) { 0x000BFFFF, 0x01, 0x00, 0x11 },
89 Package (0x04) { 0x000BFFFF, 0x02, 0x00, 0x12 },
90 Package (0x04) { 0x000BFFFF, 0x03, 0x00, 0x13 },
91 Package (0x04) { 0x000CFFFF, 0x00, 0x00, 0x11 }, /* Slot 0xC */
92 Package (0x04) { 0x000CFFFF, 0x01, 0x00, 0x12 },
93 Package (0x04) { 0x000CFFFF, 0x02, 0x00, 0x13 },
94 Package (0x04) { 0x000CFFFF, 0x03, 0x00, 0x10 },
95 Package (0x04) { 0x000DFFFF, 0x00, 0x00, 0x12 }, /* Slot 0xD */
96 Package (0x04) { 0x000DFFFF, 0x01, 0x00, 0x13 },
97 Package (0x04) { 0x000DFFFF, 0x02, 0x00, 0x10 },
98 Package (0x04) { 0x000DFFFF, 0x03, 0x00, 0x11 },
99 Package (0x04) { 0x000FFFFF, 0x01, 0x00, 0x14 }, /* 0xf SATA IRQ 20 */
100 Package (0x04) { 0x000FFFFF, 0x00, 0x00, 0x14 }, /* 0xf Native IDE IRQ 20 */
101 Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x15 }, /* USB routing */
102 Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x15 },
103 Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x15 },
104 Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x15 },
105 Package (0x04) { 0x0011FFFF, 0x02, 0x00, 0x16 }, /* AC97, MC97 */
106 Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1B }, /* PCIE16 bridge IRQ27 */
107 Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B },
108 Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1B },
109 Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1B },
110 Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1F }, /* PCIE bridge IRQ31 */
111 Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x23 }, /* IRQ36 */
112 Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x27 }, /* IRQ39 */
113 Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x2B } /* IRQ43 */
118 Name (_ADR, 0x00020000)
121 Name (_PRT, Package () {
122 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x18 }, /* PCIE IRQ24-IRQ27 */
123 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x19 },
124 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1A },
125 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1B },
131 Name (_ADR, 0x00030000)
134 Name (_PRT, Package () {
135 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x1C }, /* PCIE IRQ28-IRQ31 */
136 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x1D },
137 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1E },
138 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1F },
144 Name (_ADR, 0x00030001)
147 Name (_PRT, Package () {
148 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x20 }, /* PCIE IRQ32-IRQ35 */
149 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x21 },
150 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x22 },
151 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x23 },
157 Name (_ADR, 0x00030002)
160 Name (_PRT, Package () {
161 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x24 }, /* PCIE IRQ36-IRQ39 */
162 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x25 },
163 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x26 },
164 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x27 },
170 Name (_ADR, 0x00030003)
173 Name (_PRT, Package () {
174 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x28 }, /* PCIE IRQ40-IRQ43 */
175 Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x29 },
176 Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x2A },
177 Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x2B },
182 Name (_ADR, 0x00110000)
184 /* PS/2 keyboard (seems to be important for WinXP install) */
187 Name (_HID, EisaId ("PNP0303"))
188 Method (_STA, 0, NotSerialized)
192 Method (_CRS, 0, NotSerialized)
194 Name (TMP, ResourceTemplate () {
195 IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
196 IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
206 Name (_HID, EisaId ("PNP0F13"))
207 Method (_STA, 0, NotSerialized)
211 Method (_CRS, 0, NotSerialized)
213 Name (TMP, ResourceTemplate () {
220 /* PS/2 floppy controller */
223 Name (_HID, EisaId ("PNP0700"))
224 Method (_STA, 0, NotSerialized)
228 Method (_CRS, 0, NotSerialized)
230 Name (BUF0, ResourceTemplate () {
231 IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
232 IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
234 DMA (Compatibility, NotBusMaster, Transfer8) {2}
240 /* Dummy device to hold auto generated reserved resources */
242 Name (_HID, EisaId ("PNP0C02"))
244 External(_CRS) /* Resource Template in SSDT */