2 uses USE_FALLBACK_IMAGE
3 uses HAVE_FALLBACK_BOOT
5 uses CONFIG_ROM_PAYLOAD
9 uses MAINBOARD_PART_NUMBER
10 uses COREBOOT_EXTRA_VERSION
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_PAYLOAD_START
22 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
23 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
24 uses CONFIG_PRECOMPRESSED_PAYLOAD
34 uses DEFAULT_CONSOLE_LOGLEVEL
35 uses MAXIMUM_CONSOLE_LOGLEVEL
36 uses CONFIG_CONSOLE_SERIAL8250
40 uses CONFIG_UDELAY_TSC
41 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
42 # uses CONFIG_CONSOLE_VGA
43 # uses CONFIG_PCI_ROM_RUN
47 ## ROM_SIZE is the size of boot ROM that this board will use.
48 default ROM_SIZE = 256 * 1024
55 ## Build code for the fallback boot
57 default HAVE_FALLBACK_BOOT=1
60 ## Build code to reset the motherboard from coreboot
62 default HAVE_HARD_RESET=0
64 ## Delay timer options
66 default CONFIG_UDELAY_TSC=1
67 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
70 ## Build code to export a programmable irq routing table
72 default HAVE_PIRQ_TABLE=1
73 default IRQ_SLOT_COUNT=5 # TODO?
77 ## Build code to export a CMOS option table
79 # default HAVE_OPTION_TABLE=0
82 ### coreboot layout values
85 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
86 default ROM_IMAGE_SIZE = 64 * 1024
87 default FALLBACK_SIZE = 128 * 1024
90 ## Use a small 8K stack
92 default STACK_SIZE=0x2000
95 ## Use a small 16K heap
97 default HEAP_SIZE=0x4000
100 ## Only use the option table in a normal image
102 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
103 # default USE_OPTION_TABLE = 0
105 default _RAMBASE = 0x00004000
107 default CONFIG_ROM_PAYLOAD = 1
110 ## The default compiler
112 default CROSS_COMPILE=""
113 default CC="$(CROSS_COMPILE)gcc -m32"
117 ## The Serial Console
120 # To Enable the Serial Console
121 default CONFIG_CONSOLE_SERIAL8250=1
123 ## Select the serial console baud rate
124 default TTYS0_BAUD=115200
125 #default TTYS0_BAUD=57600
126 #default TTYS0_BAUD=38400
127 #default TTYS0_BAUD=19200
128 #default TTYS0_BAUD=9600
129 #default TTYS0_BAUD=4800
130 #default TTYS0_BAUD=2400
131 #default TTYS0_BAUD=1200
133 # Select the serial console base port
134 default TTYS0_BASE=0x3f8
136 # Select the serial protocol
137 # This defaults to 8 data bits, 1 stop bit, and no parity
138 default TTYS0_LCS=0x3
141 ### Select the coreboot loglevel
143 ## EMERG 1 system is unusable
144 ## ALERT 2 action must be taken immediately
145 ## CRIT 3 critical conditions
146 ## ERR 4 error conditions
147 ## WARNING 5 warning conditions
148 ## NOTICE 6 normal but significant condition
149 ## INFO 7 informational
150 ## DEBUG 8 debug-level messages
151 ## SPEW 9 Way too many details
153 ## Request this level of debugging output
154 default DEFAULT_CONSOLE_LOGLEVEL=9
155 ## At a maximum only compile in this level of debugging
156 default MAXIMUM_CONSOLE_LOGLEVEL=9
159 # default CONFIG_CONSOLE_VGA=1
160 # default CONFIG_PCI_ROM_RUN=1
161 default CONFIG_VIDEO_MB = 0