2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 default ROM_SECTION_SIZE = FALLBACK_SIZE
23 default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
25 default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
26 default ROM_SECTION_OFFSET = 0
28 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
29 + ROM_SECTION_OFFSET + 1)
30 default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
31 default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
32 default XIP_ROM_SIZE = 64 * 1024
33 default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
40 depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
41 action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
43 makerule ./failover.inc
44 depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
45 action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
48 # depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
49 depends "$(MAINBOARD)/auto.c ./romcc"
50 action "./romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
53 # depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
54 depends "$(MAINBOARD)/auto.c ./romcc"
55 action "./romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
57 mainboardinit cpu/x86/16bit/entry16.inc
58 mainboardinit cpu/x86/32bit/entry32.inc
59 ldscript /cpu/x86/16bit/entry16.lds
60 ldscript /cpu/x86/32bit/entry32.lds
62 mainboardinit cpu/x86/16bit/reset16.inc
63 ldscript /cpu/x86/16bit/reset16.lds
65 mainboardinit cpu/x86/32bit/reset32.inc
66 ldscript /cpu/x86/32bit/reset32.lds
68 mainboardinit arch/i386/lib/cpu_reset.inc
69 mainboardinit arch/i386/lib/id.inc
70 ldscript /arch/i386/lib/id.lds
72 ldscript /arch/i386/lib/failover.lds
73 mainboardinit ./failover.inc
75 mainboardinit cpu/x86/fpu/enable_fpu.inc
76 mainboardinit cpu/amd/model_gx1/cpu_setup.inc
77 mainboardinit cpu/amd/model_gx1/gx_setup.inc
78 mainboardinit ./auto.inc
83 chip northbridge/amd/gx1 # Northbridge
84 device pci_domain 0 on # PCI domain
85 device pci 0.0 on end # Host bridge
86 chip southbridge/amd/cs5530 # Southbridge
87 device pci 0f.0 on end # Ethernet
88 device pci 12.0 on # ISA bridge
89 chip superio/nsc/pc87351 # Super I/O
90 device pnp 2e.0 off # Floppy
95 device pnp 2e.1 on # Parallel port
99 device pnp 2e.2 on # COM2
103 device pnp 2e.e on # COM1
107 device pnp 2e.4 on # System wake-up control (SWC)
110 device pnp 2e.5 on # PS/2 mouse
113 device pnp 2e.6 on # PS/2 keyboard
118 device pnp 2e.7 on # GPIO
121 device pnp 2e.8 on # Fan speed control
126 device pci 12.1 off end # SMI
127 device pci 12.2 on end # IDE
128 device pci 12.3 on end # Audio
129 device pci 12.4 on end # VGA
130 device pci 13.0 on end # USB
131 register "ide0_enable" = "1"
132 register "ide1_enable" = "0" # No connector on this board
135 chip cpu/amd/model_gx1 # CPU