3 #include <device/pci_def.h>
4 #include <device/pci_ids.h>
6 #include "arch/romcc_io.h"
7 #include "pc80/mc146818rtc_early.c"
8 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
9 #include "northbridge/amd/amdk8/early_ht.c"
10 #include "cpu/p6/boot_cpu.c"
11 #include "northbridge/amd/amdk8/reset_test.c"
13 static void main(void)
15 /* Nothing special needs to be done to find bus 0 */
16 /* Allow the HT devices to be found */
17 enumerate_ht_chain(0);
22 /* Is this a cpu reset? */
23 if (cpu_init_detected()) {
24 if (last_boot_normal()) {
25 asm("jmp __normal_image");
27 asm("jmp __cpu_reset");
30 /* Is this a deliberate reset by the bios */
31 else if (bios_reset_detected() && last_boot_normal()) {
32 asm("jmp __normal_image");
34 /* Is this a secondary cpu? */
35 else if (!boot_cpu() && last_boot_normal()) {
36 asm("jmp __normal_image");
38 /* This is the primary cpu how should I boot? */
39 else if (do_normal_boot()) {
40 asm("jmp __normal_image");