2 ## Compute the location and size of where this firmware image
3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
6 default ROM_SECTION_SIZE = FALLBACK_SIZE
7 default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
9 default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
10 default ROM_SECTION_OFFSET = 0
14 ## Compute the start location and size size of
15 ## The linuxBIOS bootloader.
17 default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
18 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
21 ## Compute where this copy of linuxBIOS will start in the boot rom
23 default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
26 ## Compute a range of ROM that can cached to speed up linuxBIOS,
29 ## XIP_ROM_SIZE must be a power of 2.
30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
32 default XIP_ROM_SIZE=65536
33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
38 ## Build the objects we have code for in this directory.
42 if HAVE_MP_TABLE object mptable.o end
43 if HAVE_PIRQ_TABLE object irq_tables.o end
50 depends "$(MAINBOARD)/failover.c ./romcc"
51 action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
54 makerule ./failover.inc
55 depends "$(MAINBOARD)/failover.c ./romcc"
56 action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
60 depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
61 action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
64 depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
65 action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
69 ## Build our 16 bit and 32 bit linuxBIOS entry code
71 mainboardinit cpu/x86/16bit/entry16.inc
72 mainboardinit cpu/x86/32bit/entry32.inc
73 ldscript /cpu/x86/16bit/entry16.lds
74 ldscript /cpu/x86/32bit/entry32.lds
77 ## Build our reset vector (This is where linuxBIOS is entered)
80 mainboardinit cpu/x86/16bit/reset16.inc
81 ldscript /cpu/x86/16bit/reset16.lds
83 mainboardinit cpu/x86/32bit/reset32.inc
84 ldscript /cpu/x86/32bit/reset32.lds
87 ### Should this be in the northbridge code?
88 mainboardinit arch/i386/lib/cpu_reset.inc
91 ## Include an id string (For safe flashing)
93 mainboardinit arch/i386/lib/id.inc
94 ldscript /arch/i386/lib/id.lds
97 ### This is the early phase of linuxBIOS startup
98 ### Things are delicate and we test to see if we should
99 ### failover to another image.
101 if USE_FALLBACK_IMAGE
102 ldscript /arch/i386/lib/failover.lds
103 mainboardinit ./failover.inc
107 ### O.k. We aren't just an intermediary anymore!
113 mainboardinit cpu/x86/fpu/enable_fpu.inc
114 mainboardinit cpu/x86/mmx/enable_mmx.inc
115 mainboardinit cpu/x86/sse/enable_sse.inc
116 mainboardinit ./auto.inc
117 mainboardinit cpu/x86/sse/disable_sse.inc
118 mainboardinit cpu/x86/mmx/disable_mmx.inc
121 ## Include the secondary Configuration files
126 # sample config for arima/hdama
127 chip northbridge/amd/amdk8/root_complex
128 device pci_domain 0 on
129 chip northbridge/amd/amdk8
130 device pci 18.0 on # northbridge
131 # devices on link 0, link 0 == LDT 0
132 chip southbridge/amd/amd8151
133 # the on/off keyword is mandatory
134 device pci 0.0 on end
135 device pci 1.0 on end
137 chip southbridge/amd/amd8111
138 # this "device pci 0.0" is the parent the next one
141 device pci 0.0 on end
142 device pci 0.1 on end
143 device pci 0.2 on end
144 device pci 1.0 off end
147 chip superio/NSC/pc87360
148 device pnp 2e.0 off # Floppy
153 device pnp 2e.1 off # Parallel Port
157 device pnp 2e.2 off # Com 2
161 device pnp 2e.3 on # Com 1
165 device pnp 2e.4 off end # SWC
166 device pnp 2e.5 off end # Mouse
167 device pnp 2e.6 on # Keyboard
172 device pnp 2e.7 off end # GPIO
173 device pnp 2e.8 off end # ACB
174 device pnp 2e.9 off end # FSCM
175 device pnp 2e.a off end # WDT
178 device pci 1.1 on end
179 device pci 1.2 on end
181 chip drivers/generic/generic
182 #phillips pca9545 smbus mux
184 # analog_devices adm1026
185 chip drivers/generic/generic
193 chip drivers/generic/generic #dimm 0-0-0
196 chip drivers/generic/generic #dimm 0-0-1
200 device pci 1.5 off end
201 device pci 1.6 on end
203 end # device pci 18.0
205 device pci 18.0 on end # LDT1
206 device pci 18.0 on end # LDT2
207 device pci 18.1 on end
208 device pci 18.2 on end
209 device pci 18.3 on end
212 device apic_cluster 0 on
213 chip cpu/amd/socket_754