5 uses USE_FALLBACK_IMAGE
6 uses HAVE_FALLBACK_BOOT
7 uses USE_FAILOVER_IMAGE
8 uses HAVE_FAILOVER_BOOT
11 uses HAVE_OPTION_TABLE
13 uses CONFIG_MAX_PHYSICAL_CPUS
14 uses CONFIG_LOGICAL_CPUS
23 uses ROM_SECTION_OFFSET
24 uses CONFIG_ROM_STREAM
25 uses CONFIG_ROM_STREAM_START
26 uses CONFIG_COMPRESSED_ROM_STREAM_LZMA
34 uses LB_CKS_RANGE_START
37 uses MAINBOARD_PART_NUMBER
40 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
41 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
42 uses LINUXBIOS_EXTRA_VERSION
47 uses DEFAULT_CONSOLE_LOGLEVEL
48 uses MAXIMUM_CONSOLE_LOGLEVEL
49 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
50 uses CONFIG_CONSOLE_SERIAL8250
59 uses CONFIG_CONSOLE_VGA
60 uses CONFIG_PCI_ROM_RUN
61 uses HW_MEM_HOLE_SIZEK
62 uses HW_MEM_HOLE_SIZE_AUTO_INC
63 uses K8_HT_FREQ_1G_SUPPORT
65 uses HT_CHAIN_UNITID_BASE
66 uses HT_CHAIN_END_UNITID_BASE
67 uses SB_HT_CHAIN_ON_BUS0
68 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
77 uses ENABLE_APIC_EXT_ID
81 uses CONFIG_PCI_64BIT_PREF_MEM
83 uses CONFIG_LB_MEM_TOPK
85 uses CONFIG_USE_PRINTK_IN_CAR
92 ## ROM_SIZE is the size of boot ROM that this board will use.
94 default ROM_SIZE=524288
97 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
99 #default FALLBACK_SIZE=131072
100 #default FALLBACK_SIZE=0x40000
103 default FALLBACK_SIZE=0x3f000
105 default FAILOVER_SIZE=0x01000
107 default CONFIG_LB_MEM_TOPK=2048
110 ## Build code for the fallback boot
112 default HAVE_FALLBACK_BOOT=1
113 default HAVE_FAILOVER_BOOT=1
116 ## Build code to reset the motherboard from linuxBIOS
118 default HAVE_HARD_RESET=1
121 ## Build code to export a programmable irq routing table
123 default HAVE_PIRQ_TABLE=1
124 default IRQ_SLOT_COUNT=11
127 ## Build code to export an x86 MP table
128 ## Useful for specifying IRQ routing values
130 default HAVE_MP_TABLE=1
132 ## ACPI tables will be included
133 default HAVE_ACPI_TABLES=1
135 default ACPI_SSDTX_NUM=1
138 ## Build code to export a CMOS option table
140 default HAVE_OPTION_TABLE=1
143 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
145 default LB_CKS_RANGE_START=49
146 default LB_CKS_RANGE_END=122
147 default LB_CKS_LOC=123
150 ## Build code for SMP support
151 ## Only worry about 2 micro processors
154 default CONFIG_MAX_CPUS=4
155 default CONFIG_MAX_PHYSICAL_CPUS=2
156 default CONFIG_LOGICAL_CPUS=1
158 default SERIAL_CPU_INIT=0
160 default ENABLE_APIC_EXT_ID=0
161 default APIC_ID_OFFSET=0x8
162 default LIFT_BSP_APIC_ID=0
165 default CONFIG_CHIP_NAME=1
167 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
169 #default HW_MEM_HOLE_SIZEK=0x200000
171 default HW_MEM_HOLE_SIZEK=0x100000
173 #default HW_MEM_HOLE_SIZEK=0x80000
175 #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy
176 #default HW_MEM_HOLE_SIZE_AUTO_INC=1
178 #Opteron K8 1G HT Support
179 default K8_HT_FREQ_1G_SUPPORT=1
182 default CONFIG_CONSOLE_VGA=1
183 default CONFIG_PCI_ROM_RUN=1
186 default HT_CHAIN_UNITID_BASE=0xa
189 default HT_CHAIN_END_UNITID_BASE=0x6
191 #make the SB HT chain on bus 0
192 default SB_HT_CHAIN_ON_BUS0=2
194 #allow capable device use that above 4G
195 #default CONFIG_PCI_64BIT_PREF_MEM=1
198 ## enable CACHE_AS_RAM specifics
200 default USE_DCACHE_RAM=1
201 default DCACHE_RAM_BASE=0xcc000
202 default DCACHE_RAM_SIZE=0x4000
203 default CONFIG_USE_INIT=0
206 ## Build code to setup a generic IOAPIC
208 default CONFIG_IOAPIC=1
211 ## Clean up the motherboard id strings
213 default MAINBOARD_PART_NUMBER="serengeti_leopard"
214 default MAINBOARD_VENDOR="AMD"
215 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
216 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
219 ### LinuxBIOS layout values
222 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
223 default ROM_IMAGE_SIZE = 65536
226 ## Use a small 8K stack
228 default STACK_SIZE=0x2000
231 ## Use a small 16K heap
233 default HEAP_SIZE=0x4000
236 ## Only use the option table in a normal image
238 default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
241 ## LinuxBIOS C code runs at this location in RAM
243 default _RAMBASE=0x00004000
246 ## Load the payload from the ROM
248 default CONFIG_ROM_STREAM = 1
251 ### Defaults of options that you may want to override in the target config file
255 ## The default compiler
257 default CC="$(CROSS_COMPILE)gcc-4.0.2 -m32"
258 default HOSTCC="gcc-4.0.2"
261 ## Disable the gdb stub by default
263 default CONFIG_GDB_STUB=0
266 ## The Serial Console
268 default CONFIG_USE_PRINTK_IN_CAR=1
270 # To Enable the Serial Console
271 default CONFIG_CONSOLE_SERIAL8250=1
273 ## Select the serial console baud rate
274 default TTYS0_BAUD=115200
275 #default TTYS0_BAUD=57600
276 #default TTYS0_BAUD=38400
277 #default TTYS0_BAUD=19200
278 #default TTYS0_BAUD=9600
279 #default TTYS0_BAUD=4800
280 #default TTYS0_BAUD=2400
281 #default TTYS0_BAUD=1200
283 # Select the serial console base port
284 default TTYS0_BASE=0x3f8
286 # Select the serial protocol
287 # This defaults to 8 data bits, 1 stop bit, and no parity
288 default TTYS0_LCS=0x3
291 ### Select the linuxBIOS loglevel
293 ## EMERG 1 system is unusable
294 ## ALERT 2 action must be taken immediately
295 ## CRIT 3 critical conditions
296 ## ERR 4 error conditions
297 ## WARNING 5 warning conditions
298 ## NOTICE 6 normal but significant condition
299 ## INFO 7 informational
300 ## DEBUG 8 debug-level messages
301 ## SPEW 9 Way too many details
303 ## Request this level of debugging output
304 default DEFAULT_CONSOLE_LOGLEVEL=8
305 ## At a maximum only compile in this level of debugging
306 default MAXIMUM_CONSOLE_LOGLEVEL=8
309 ## Select power on after power fail setting
310 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"