2 # This file is part of the LinuxBIOS project.
4 # Copyright (C) 2007 Advanced Micro Devices, Inc.
6 # This program is free software; you can redistribute it and/or modify
7 # it under the terms of the GNU General Public License as published by
8 # the Free Software Foundation; version 2 of the License.
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 # GNU General Public License for more details.
15 # You should have received a copy of the GNU General Public License
16 # along with this program; if not, write to the Free Software
17 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 uses USE_FALLBACK_IMAGE
25 uses USE_FAILOVER_IMAGE
26 uses HAVE_FALLBACK_BOOT
27 uses HAVE_FAILOVER_BOOT
30 uses HAVE_OPTION_TABLE
32 uses CONFIG_MAX_PHYSICAL_CPUS
33 uses CONFIG_LOGICAL_CPUS
42 uses ROM_SECTION_OFFSET
43 uses CONFIG_ROM_PAYLOAD
44 uses CONFIG_ROM_PAYLOAD_START
52 uses LB_CKS_RANGE_START
55 uses MAINBOARD_PART_NUMBER
58 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
59 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
60 uses LINUXBIOS_EXTRA_VERSION
65 uses DEFAULT_CONSOLE_LOGLEVEL
66 uses MAXIMUM_CONSOLE_LOGLEVEL
67 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
68 uses CONFIG_CONSOLE_SERIAL8250
77 uses CONFIG_CONSOLE_VGA
78 uses CONFIG_PCI_ROM_RUN
79 uses HW_MEM_HOLE_SIZEK
80 uses HW_MEM_HOLE_SIZE_AUTO_INC
82 uses HT_CHAIN_UNITID_BASE
83 uses HT_CHAIN_END_UNITID_BASE
84 uses SB_HT_CHAIN_ON_BUS0
85 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
90 uses DCACHE_RAM_GLOBAL_VAR_SIZE
95 uses ENABLE_APIC_EXT_ID
99 uses CONFIG_PCI_64BIT_PREF_MEM
101 uses CONFIG_LB_MEM_TOPK
103 uses PCI_BUS_SEGN_BITS
105 uses CONFIG_AP_CODE_IN_CAR
109 uses WAIT_BEFORE_CPUS_INIT
113 uses CONFIG_USE_PRINTK_IN_CAR
121 ## ROM_SIZE is the size of boot ROM that this board will use.
123 default ROM_SIZE=524288
127 #FALLBACK_SIZE_SIZE is the amount of the ROM the complete fallback image will use
129 #default FALLBACK_SIZE=131072
130 #default FALLBACK_SIZE=0x40000
133 default FALLBACK_SIZE=0x7f000
135 default FAILOVER_SIZE=0x01000
138 #if there is RAM on node0, we need to set it to 32M, otherwise can not access CAR on node0, and RAM on node1 at same time.
139 default CONFIG_LB_MEM_TOPK=16384
142 ## Build code for the fallback boot
144 default HAVE_FALLBACK_BOOT=1
145 default HAVE_FAILOVER_BOOT=1
148 ## Build code to reset the motherboard from linuxBIOS
150 default HAVE_HARD_RESET=1
153 ## Build code to export a programmable irq routing table
155 default HAVE_PIRQ_TABLE=1
156 default IRQ_SLOT_COUNT=11
159 ## Build code to export an x86 MP table
160 ## Useful for specifying IRQ routing values
162 default HAVE_MP_TABLE=1
164 ## ACPI tables will be included
165 default HAVE_ACPI_TABLES=1
167 default ACPI_SSDTX_NUM=31
170 ## Build code to export a CMOS option table
172 default HAVE_OPTION_TABLE=1
175 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
177 default LB_CKS_RANGE_START=49
178 default LB_CKS_RANGE_END=122
179 default LB_CKS_LOC=123
182 ## Build code for SMP support
183 ## Only worry about 2 micro processors
186 default CONFIG_MAX_PHYSICAL_CPUS=2
187 default CONFIG_MAX_CPUS=4 * CONFIG_MAX_PHYSICAL_CPUS
188 default CONFIG_LOGICAL_CPUS=1
190 #default SERIAL_CPU_INIT=0
192 default ENABLE_APIC_EXT_ID=1
193 default APIC_ID_OFFSET=0x00
194 default LIFT_BSP_APIC_ID=1
197 default CONFIG_CHIP_NAME=1
199 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
201 #default HW_MEM_HOLE_SIZEK=0x200000
203 default HW_MEM_HOLE_SIZEK=0x100000
205 #default HW_MEM_HOLE_SIZEK=0x80000
207 #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy
208 #default HW_MEM_HOLE_SIZE_AUTO_INC=1
211 default CONFIG_CONSOLE_VGA=1
212 default CONFIG_PCI_ROM_RUN=1
214 #HT Unit ID offset, default is 1, the typical one
215 default HT_CHAIN_UNITID_BASE=0xa
217 #real SB Unit ID, default is 0x20, mean dont touch it at last
218 default HT_CHAIN_END_UNITID_BASE=0x6
220 #make the SB HT chain on bus 0, default is not (0)
221 default SB_HT_CHAIN_ON_BUS0=2
223 #only offset for SB chain?, default is yes(1)
224 #default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
226 #allow capable device use that above 4G
227 #default CONFIG_PCI_64BIT_PREF_MEM=1
229 #it only be 0, 1, 2, 3, 4 and default is 0
230 #default PCI_BUS_SEGN_BITS=3
233 ## enable CACHE_AS_RAM specifics
235 default USE_DCACHE_RAM=1
236 default DCACHE_RAM_BASE=0xc4000
237 default DCACHE_RAM_SIZE=0x0c000
238 #default DCACHE_RAM_GLOBAL_VAR_SIZE=0x08000
239 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x04000
240 default CONFIG_USE_INIT=0
242 #default CONFIG_AP_CODE_IN_CAR=1
243 default MEM_TRAIN_SEQ=2
244 default WAIT_BEFORE_CPUS_INIT=0
246 default CONFIG_AMDMCT = 1
249 ## Build code to setup a generic IOAPIC
251 default CONFIG_IOAPIC=1
254 ## Clean up the motherboard id strings
256 default MAINBOARD_PART_NUMBER="Cheetah Fam10"
257 default MAINBOARD_VENDOR="AMD"
258 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
259 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
262 ### LinuxBIOS layout values
265 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
266 default ROM_IMAGE_SIZE = 65536
269 ## Use a small 8K stack
271 default STACK_SIZE=0x2000
274 ## Use a small 768k heap
276 default HEAP_SIZE=0xc0000
279 ## Only use the option table in a normal image
281 default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
284 ## LinuxBIOS C code runs at this location in RAM
286 default _RAMBASE=0x00200000
289 ## Load the payload from the ROM
291 default CONFIG_ROM_PAYLOAD = 1
294 ### Defaults of options that you may want to override in the target config file
298 ## The default compiler
300 default CC="$(CROSS_COMPILE)gcc -m32"
304 ## Disable the gdb stub by default
306 default CONFIG_GDB_STUB=0
309 ## The Serial Console
312 default CONFIG_USE_PRINTK_IN_CAR=1
314 # To Enable the Serial Console
315 default CONFIG_CONSOLE_SERIAL8250=1
317 ## Select the serial console baud rate
318 default TTYS0_BAUD=115200
319 #default TTYS0_BAUD=57600
320 #default TTYS0_BAUD=38400
321 #default TTYS0_BAUD=19200
322 #default TTYS0_BAUD=9600
323 #default TTYS0_BAUD=4800
324 #default TTYS0_BAUD=2400
325 #default TTYS0_BAUD=1200
327 # Select the serial console base port
328 default TTYS0_BASE=0x3f8
330 # Select the serial protocol
331 # This defaults to 8 data bits, 1 stop bit, and no parity
332 default TTYS0_LCS=0x3
335 ### Select the linuxBIOS loglevel
337 ## EMERG 1 system is unusable
338 ## ALERT 2 action must be taken immediately
339 ## CRIT 3 critical conditions
340 ## ERR 4 error conditions
341 ## WARNING 5 warning conditions
342 ## NOTICE 6 normal but significant condition
343 ## INFO 7 informational
344 ## DEBUG 8 debug-level messages
345 ## SPEW 9 Way too many details
347 ## Request this level of debugging output
348 default DEFAULT_CONSOLE_LOGLEVEL=8
349 ## At a maximum only compile in this level of debugging
350 default MAXIMUM_CONSOLE_LOGLEVEL=8
353 ## Select power on after power fail setting
354 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"