Fix all board names in Kconfig as per wiki / vendor website.
[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / Kconfig
1 config BOARD_AMD_SERENGETI_CHEETAH_FAM10
2         bool "Serengeti Cheetah (Fam10)"
3         select ARCH_X86
4         select CPU_AMD_FAM10
5         select CPU_AMD_SOCKET_F_1207
6         select NORTHBRIDGE_AMD_AMDFAM10
7         select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
8         select SOUTHBRIDGE_AMD_AMD8111
9         select SOUTHBRIDGE_AMD_AMD8132
10         select SUPERIO_WINBOND_W83627HF
11         select HAVE_PIRQ_TABLE
12         select HAVE_MP_TABLE
13         select USE_PRINTK_IN_CAR
14         select USE_DCACHE_RAM
15         select HAVE_HARD_RESET
16         select IOAPIC
17         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
18         select SERIAL_CPU_INIT
19         select AMDMCT
20         select HAVE_ACPI_TABLES
21         select BOARD_ROMSIZE_KB_1024
22         select ENABLE_APIC_EXT_ID
23         select LIFT_BSP_APIC_ID
24
25 config MAINBOARD_DIR
26         string
27         default amd/serengeti_cheetah_fam10
28         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
29
30 config APIC_ID_OFFSET
31         hex
32         default 0x0
33         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
34
35 config LB_CKS_RANGE_END
36         int
37         default 122
38         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
39
40 config LB_CKS_LOC
41         int
42         default 123
43         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
44
45 config MAINBOARD_PART_NUMBER
46         string
47         default "Serengeti Cheetah (Fam10)"
48         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
49
50 config HW_MEM_HOLE_SIZEK
51         hex
52         default 0x100000
53         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
54
55 # 6 * MAX_PHYSICAL_CPUS
56 config MAX_CPUS
57         int
58         default 48
59         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
60
61 config MAX_PHYSICAL_CPUS
62         int
63         default 8
64         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
65
66 config HW_MEM_HOLE_SIZE_AUTO_INC
67         bool
68         default n
69         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
70
71 config SB_HT_CHAIN_ON_BUS0
72         int
73         default 2
74         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
75
76 config HT_CHAIN_END_UNITID_BASE
77         hex
78         default 0x6
79         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
80
81 config HT_CHAIN_UNITID_BASE
82         hex
83         default 0xa
84         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
85
86 config USE_INIT
87         bool
88         default n
89         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
90
91 config IRQ_SLOT_COUNT
92         int
93         default 11
94         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
95
96 config AMD_UCODE_PATCH_FILE
97         string
98         default "mc_patch_01000095.h"
99         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
100
101 config RAMTOP
102         hex
103         default 0x1000000
104         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
105
106 config HEAP_SIZE
107         hex
108         default 0xc0000
109         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
110
111 config ACPI_SSDTX_NUM
112         int
113         default 31
114         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
115
116 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
117         hex
118         default 0x2b80
119         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
120
121 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
122         hex
123         default 0x1022
124         depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
125