5 uses USE_FALLBACK_IMAGE
6 uses USE_FAILOVER_IMAGE
7 uses HAVE_FALLBACK_BOOT
8 uses HAVE_FAILOVER_BOOT
11 uses HAVE_OPTION_TABLE
13 uses CONFIG_MAX_PHYSICAL_CPUS
14 uses CONFIG_LOGICAL_CPUS
23 uses ROM_SECTION_OFFSET
24 uses CONFIG_ROM_STREAM
25 uses CONFIG_ROM_STREAM_START
26 uses CONFIG_COMPRESSED_ROM_STREAM
34 uses LB_CKS_RANGE_START
37 uses MAINBOARD_PART_NUMBER
40 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
41 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
42 uses LINUXBIOS_EXTRA_VERSION
47 uses DEFAULT_CONSOLE_LOGLEVEL
48 uses MAXIMUM_CONSOLE_LOGLEVEL
49 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
50 uses CONFIG_CONSOLE_SERIAL8250
59 uses CONFIG_CONSOLE_VGA
60 uses CONFIG_PCI_ROM_RUN
61 uses HW_MEM_HOLE_SIZEK
62 uses HW_MEM_HOLE_SIZE_AUTO_INC
63 uses K8_HT_FREQ_1G_SUPPORT
65 uses HT_CHAIN_UNITID_BASE
66 uses HT_CHAIN_END_UNITID_BASE
67 uses SB_HT_CHAIN_ON_BUS0
68 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
73 uses DCACHE_RAM_GLOBAL_VAR_SIZE
78 uses ENABLE_APIC_EXT_ID
82 uses CONFIG_PCI_64BIT_PREF_MEM
84 uses CONFIG_LB_MEM_TOPK
86 uses CONFIG_AP_CODE_IN_CAR
90 uses WAIT_BEFORE_CPUS_INIT
97 ## ROM_SIZE is the size of boot ROM that this board will use.
99 default ROM_SIZE=524288
102 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
104 #default FALLBACK_SIZE=131072
105 #default FALLBACK_SIZE=0x40000
108 default FALLBACK_SIZE=0x3f000
110 default FAILOVER_SIZE=0x01000
113 default CONFIG_LB_MEM_TOPK=2048
116 ## Build code for the fallback boot
118 default HAVE_FALLBACK_BOOT=1
119 default HAVE_FAILOVER_BOOT=1
122 ## Build code to reset the motherboard from linuxBIOS
124 default HAVE_HARD_RESET=1
127 ## Build code to export a programmable irq routing table
129 default HAVE_PIRQ_TABLE=1
130 default IRQ_SLOT_COUNT=11
133 ## Build code to export an x86 MP table
134 ## Useful for specifying IRQ routing values
136 default HAVE_MP_TABLE=1
138 ## ACPI tables will be included
139 default HAVE_ACPI_TABLES=1
141 default ACPI_SSDTX_NUM=1
144 ## Build code to export a CMOS option table
146 default HAVE_OPTION_TABLE=1
149 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
151 default LB_CKS_RANGE_START=49
152 default LB_CKS_RANGE_END=122
153 default LB_CKS_LOC=123
156 ## Build code for SMP support
157 ## Only worry about 2 micro processors
160 default CONFIG_MAX_CPUS=8
161 default CONFIG_MAX_PHYSICAL_CPUS=4
162 default CONFIG_LOGICAL_CPUS=1
164 default SERIAL_CPU_INIT=0
166 default ENABLE_APIC_EXT_ID=0
167 default APIC_ID_OFFSET=0x8
168 default LIFT_BSP_APIC_ID=1
171 default CONFIG_CHIP_NAME=1
173 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
175 #default HW_MEM_HOLE_SIZEK=0x200000
177 default HW_MEM_HOLE_SIZEK=0x100000
179 #default HW_MEM_HOLE_SIZEK=0x80000
181 #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy
182 #default HW_MEM_HOLE_SIZE_AUTO_INC=1
184 #Opteron K8 1G HT Support
185 default K8_HT_FREQ_1G_SUPPORT=1
188 default CONFIG_CONSOLE_VGA=1
189 default CONFIG_PCI_ROM_RUN=1
191 #HT Unit ID offset, default is 1, the typical one
192 default HT_CHAIN_UNITID_BASE=0xa
194 #real SB Unit ID, default is 0x20, mean dont touch it at last
195 default HT_CHAIN_END_UNITID_BASE=0x6
197 #make the SB HT chain on bus 0, default is not (0)
198 default SB_HT_CHAIN_ON_BUS0=2
200 #only offset for SB chain?, default is yes(1)
201 #default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
203 #allow capable device use that above 4G
204 #default CONFIG_PCI_64BIT_PREF_MEM=1
207 ## enable CACHE_AS_RAM specifics
209 default USE_DCACHE_RAM=1
210 default DCACHE_RAM_BASE=0xc8000
211 default DCACHE_RAM_SIZE=0x08000
212 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000
213 default CONFIG_USE_INIT=0
215 default CONFIG_AP_CODE_IN_CAR=1
216 default MEM_TRAIN_SEQ=1
218 default WAIT_BEFORE_CPUS_INIT=1
221 ## Build code to setup a generic IOAPIC
223 default CONFIG_IOAPIC=1
226 ## Clean up the motherboard id strings
228 default MAINBOARD_PART_NUMBER="serengeti_cheetah"
229 default MAINBOARD_VENDOR="AMD"
230 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
231 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
234 ### LinuxBIOS layout values
237 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
238 default ROM_IMAGE_SIZE = 65536
241 ## Use a small 8K stack
243 default STACK_SIZE=0x2000
246 ## Use a small 32K heap
248 default HEAP_SIZE=0x8000
251 ## Only use the option table in a normal image
253 default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
256 ## LinuxBIOS C code runs at this location in RAM
258 default _RAMBASE=0x00100000
261 ## Load the payload from the ROM
263 default CONFIG_ROM_STREAM = 1
265 #default CONFIG_COMPRESSED_ROM_STREAM = 1
268 ### Defaults of options that you may want to override in the target config file
272 ## The default compiler
274 default CC="$(CROSS_COMPILE)gcc-3.4.5 -m32"
275 default HOSTCC="gcc-3.4.5"
278 ## Disable the gdb stub by default
280 default CONFIG_GDB_STUB=0
283 ## The Serial Console
286 # To Enable the Serial Console
287 default CONFIG_CONSOLE_SERIAL8250=1
289 ## Select the serial console baud rate
290 default TTYS0_BAUD=115200
291 #default TTYS0_BAUD=57600
292 #default TTYS0_BAUD=38400
293 #default TTYS0_BAUD=19200
294 #default TTYS0_BAUD=9600
295 #default TTYS0_BAUD=4800
296 #default TTYS0_BAUD=2400
297 #default TTYS0_BAUD=1200
299 # Select the serial console base port
300 default TTYS0_BASE=0x3f8
302 # Select the serial protocol
303 # This defaults to 8 data bits, 1 stop bit, and no parity
304 default TTYS0_LCS=0x3
307 ### Select the linuxBIOS loglevel
309 ## EMERG 1 system is unusable
310 ## ALERT 2 action must be taken immediately
311 ## CRIT 3 critical conditions
312 ## ERR 4 error conditions
313 ## WARNING 5 warning conditions
314 ## NOTICE 6 normal but significant condition
315 ## INFO 7 informational
316 ## DEBUG 8 debug-level messages
317 ## SPEW 9 Way too many details
319 ## Request this level of debugging output
320 default DEFAULT_CONSOLE_LOGLEVEL=8
321 ## At a maximum only compile in this level of debugging
322 default MAXIMUM_CONSOLE_LOGLEVEL=8
325 ## Select power on after power fail setting
326 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"