src/mainboard/amd/serengeti_cheetah/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FAILOVER_IMAGE
   6         default ROM_SECTION_SIZE   = FAILOVER_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
   8 else
   9     if USE_FALLBACK_IMAGE
  10         default ROM_SECTION_SIZE   = FALLBACK_SIZE
  11         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
  12     else
  13         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
  14         default ROM_SECTION_OFFSET = 0
  15     end
  16 end
  17
  18 ##
  19 ## Compute the start location and size size of
  20 ## The linuxBIOS bootloader.
  21 ##
  22 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  23 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  24
  25 ##
  26 ## Compute where this copy of linuxBIOS will start in the boot rom
  27 ##
  28 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
  29
  30 ##
  31 ## Compute a range of ROM that can cached to speed up linuxBIOS,
  32 ## execution speed.
  33 ##
  34 ## XIP_ROM_SIZE must be a power of 2.
  35 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  36 ##
  37 default XIP_ROM_SIZE=65536
  38
  39 if USE_FAILOVER_IMAGE
  40         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
  41 else
  42     if USE_FALLBACK_IMAGE
  43         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
  44     else
  45         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
  46     end
  47 end
  48
  49 arch i386 end
  50
  51 ##
  52 ## Build the objects we have code for in this directory.
  53 ##
  54
  55 driver mainboard.o
  56
  57 #dir /drivers/si/3114
  58
  59 #needed by irq_tables and mptable and acpi_tables
  60 object get_bus_conf.o
  61
  62 if HAVE_MP_TABLE
  63         object mptable.o
  64 end
  65
  66 if HAVE_PIRQ_TABLE
  67         object irq_tables.o
  68 end
  69
  70 #if HAVE_ACPI_TABLES
  71 #       object acpi_tables.o
  72 #       object fadt.o
  73 #       if SB_HT_CHAIN_ON_BUS0
  74 #               object dsdt_bus0.o
  75 #       else
  76 #               object dsdt.o
  77 #       end
  78 #       object ssdt.o
  79 #       if ACPI_SSDTX_NUM
  80 #                if SB_HT_CHAIN_ON_BUS0
  81 #                 object ssdt2_bus0.o
  82 #                else
  83 #                 object ssdt2.o
  84 #                end
  85 #       end
  86 #end
  87
  88 if HAVE_ACPI_TABLES
  89         object acpi_tables.o
  90         object fadt.o
  91         makerule dsdt.c
  92                 depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
  93                 action  "/usr/sbin/iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
  94                 action  "mv dsdt_lb.hex dsdt.c"
  95         end
  96         object ./dsdt.o
  97
  98         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  99
 100         if ACPI_SSDTX_NUM
 101             makerule ssdt2.c
 102                         depends "$(MAINBOARD)/dx/pci2.asl"
 103                         action  "/usr/sbin/iasl -tc $(MAINBOARD)/dx/pci2.asl"
 104                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
 105                         action  "mv pci2.hex ssdt2.c"
 106             end
 107             object ./ssdt2.o
 108         end
 109 end
 110
 111 if USE_DCACHE_RAM
 112
 113         if CONFIG_USE_INIT
 114                 # compile cache_as_ram.c to auto.o
 115                 makerule ./cache_as_ram_auto.o
 116                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
 117                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
 118                 end
 119
 120         else
 121                 #compile cache_as_ram.c to auto.inc
 122                 makerule ./cache_as_ram_auto.inc
 123                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
 124                         action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
 125                         action "perl -e 's/.rodata/.rom.data/g' -pi $@"
 126                         action "perl -e 's/.text/.section .rom.text/g' -pi $@"
 127                 end
 128
 129         end
 130 end
 131
 132 if USE_FAILOVER_IMAGE
 133 else
 134     if CONFIG_AP_CODE_IN_CAR
 135         makerule ./apc_auto.o
 136                 depends "$(MAINBOARD)/apc_auto.c option_table.h"
 137                 action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/apc_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
 138         end
 139         ldscript /arch/i386/init/ldscript_apc.lb
 140     end
 141 end
 142
 143 ##
 144 ## Build our 16 bit and 32 bit linuxBIOS entry code
 145 ##
 146
 147 if HAVE_FAILOVER_BOOT
 148     if USE_FAILOVER_IMAGE
 149         mainboardinit cpu/x86/16bit/entry16.inc
 150         ldscript /cpu/x86/16bit/entry16.lds
 151     end
 152 else
 153     if USE_FALLBACK_IMAGE
 154         mainboardinit cpu/x86/16bit/entry16.inc
 155         ldscript /cpu/x86/16bit/entry16.lds
 156     end
 157 end
 158
 159 mainboardinit cpu/x86/32bit/entry32.inc
 160 if USE_DCACHE_RAM
 161         if CONFIG_USE_INIT
 162                 ldscript /cpu/x86/32bit/entry32.lds
 163         end
 164
 165         if CONFIG_USE_INIT
 166                 ldscript /cpu/amd/car/cache_as_ram.lds
 167         end
 168 end
 169
 170 ##
 171 ## Build our reset vector (This is where linuxBIOS is entered)
 172 ##
 173 if HAVE_FAILOVER_BOOT
 174     if USE_FAILOVER_IMAGE
 175         mainboardinit cpu/x86/16bit/reset16.inc
 176         ldscript /cpu/x86/16bit/reset16.lds
 177     else
 178         mainboardinit cpu/x86/32bit/reset32.inc
 179         ldscript /cpu/x86/32bit/reset32.lds
 180     end
 181 else
 182     if USE_FALLBACK_IMAGE
 183         mainboardinit cpu/x86/16bit/reset16.inc
 184         ldscript /cpu/x86/16bit/reset16.lds
 185     else
 186         mainboardinit cpu/x86/32bit/reset32.inc
 187         ldscript /cpu/x86/32bit/reset32.lds
 188     end
 189 end
 190
 191 ##
 192 ## Include an id string (For safe flashing)
 193 ##
 194 mainboardinit arch/i386/lib/id.inc
 195 ldscript /arch/i386/lib/id.lds
 196
 197 if USE_DCACHE_RAM
 198         ##
 199         ## Setup Cache-As-Ram
 200         ##
 201         mainboardinit cpu/amd/car/cache_as_ram.inc
 202 end
 203
 204 ###
 205 ### This is the early phase of linuxBIOS startup
 206 ### Things are delicate and we test to see if we should
 207 ### failover to another image.
 208 ###
 209 if HAVE_FAILOVER_BOOT
 210     if USE_FAILOVER_IMAGE
 211         if USE_DCACHE_RAM
 212                 ldscript /arch/i386/lib/failover_failover.lds
 213         end
 214     end
 215 else
 216     if USE_FALLBACK_IMAGE
 217         if USE_DCACHE_RAM
 218                 ldscript /arch/i386/lib/failover.lds
 219         end
 220     end
 221 end
 222
 223 ###
 224 ### O.k. We aren't just an intermediary anymore!
 225 ###
 226
 227 ##
 228 ## Setup RAM
 229 ##
 230 if USE_DCACHE_RAM
 231
 232         if CONFIG_USE_INIT
 233                 initobject cache_as_ram_auto.o
 234         else
 235                 mainboardinit ./cache_as_ram_auto.inc
 236         end
 237
 238 end
 239
 240 ##
 241 ## Include the secondary Configuration files
 242 ##
 243 if CONFIG_CHIP_NAME
 244         config chip.h
 245 end
 246
 247 # sample config for amd/serengeti_cheetah
 248 chip northbridge/amd/amdk8/root_complex
 249         device apic_cluster 0 on
 250                 chip cpu/amd/socket_F
 251                         device apic 0 on end
 252                 end
 253         end
 254         device pci_domain 0 on
 255                 chip northbridge/amd/amdk8
 256                         device pci 18.0 on #  northbridge
 257                                 #  devices on link 0, link 0 == LDT 0
 258                                 chip southbridge/amd/amd8132
 259                                         # the on/off keyword is mandatory
 260                                         device pci 0.0 on end
 261                                         device pci 0.1 on end
 262                                         device pci 1.0 on end
 263                                         device pci 1.1 on end
 264                                 end
 265                                 chip southbridge/amd/amd8111
 266                                         # this "device pci 0.0" is the parent the next one
 267                                         # PCI bridge
 268                                         device pci 0.0 on
 269                                                 device pci 0.0 on end
 270                                                 device pci 0.1 on end
 271                                                 device pci 0.2 off end
 272                                                 device pci 1.0 off end
 273                                         end
 274                                         device pci 1.0 on
 275                                                 chip superio/winbond/w83627hf
 276                                                         device pnp 2e.0 off #  Floppy
 277                                                                 io 0x60 = 0x3f0
 278                                                                 irq 0x70 = 6
 279                                                                 drq 0x74 = 2
 280                                                         end
 281                                                         device pnp 2e.1 off #  Parallel Port
 282                                                                 io 0x60 = 0x378
 283                                                                 irq 0x70 = 7
 284                                                         end
 285                                                         device pnp 2e.2 on #  Com1
 286                                                                 io 0x60 = 0x3f8
 287                                                                 irq 0x70 = 4
 288                                                         end
 289                                                         device pnp 2e.3 off #  Com2
 290                                                                 io 0x60 = 0x2f8
 291                                                                 irq 0x70 = 3
 292                                                         end
 293                                                         device pnp 2e.5 on #  Keyboard
 294                                                                 io 0x60 = 0x60
 295                                                                 io 0x62 = 0x64
 296                                                                 irq 0x70 = 1
 297                                                                 irq 0x72 = 12
 298                                                         end
 299                                                         device pnp 2e.6 off #  CIR
 300                                                                 io 0x60 = 0x100
 301                                                         end
 302                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 303                                                                 io 0x60 = 0x220
 304                                                                 io 0x62 = 0x300
 305                                                                 irq 0x70 = 9
 306                                                         end
 307                                                         device pnp 2e.8 off end #  GPIO2
 308                                                         device pnp 2e.9 off end #  GPIO3
 309                                                         device pnp 2e.a off end #  ACPI
 310                                                         device pnp 2e.b on #  HW Monitor
 311                                                                 io 0x60 = 0x290
 312                                                                 irq 0x70 = 5
 313                                                         end
 314                                                 end
 315                                         end
 316                                         device pci 1.1 on end
 317                                         device pci 1.2 on end
 318                                         device pci 1.3 on
 319                                                 chip drivers/i2c/i2cmux # pca9556 smbus mux
 320                                                         device i2c 18 on #0 pca9516 1
 321                                                                 chip drivers/generic/generic #dimm 0-0-0
 322                                                                         device i2c 50 on end
 323                                                                 end
 324                                                                 chip drivers/generic/generic #dimm 0-0-1
 325                                                                         device i2c 51 on end
 326                                                                 end
 327                                                                 chip drivers/generic/generic #dimm 0-1-0
 328                                                                         device i2c 52 on end
 329                                                                 end
 330                                                                 chip drivers/generic/generic #dimm 0-1-1
 331                                                                         device i2c 53 on end
 332                                                                 end
 333                                                         end
 334                                                         device i2c 18 on #1 pca9516 2
 335                                                                 chip drivers/generic/generic #dimm 1-0-0
 336                                                                         device i2c 50 on end
 337                                                                 end
 338                                                                 chip drivers/generic/generic #dimm 1-0-1
 339                                                                         device i2c 51 on end
 340                                                                 end
 341                                                                 chip drivers/generic/generic #dimm 1-1-0
 342                                                                         device i2c 52 on end
 343                                                                 end
 344                                                                 chip drivers/generic/generic #dimm 1-1-1
 345                                                                         device i2c 53 on end
 346                                                                 end
 347                                                                 chip drivers/generic/generic #dimm 1-2-0
 348                                                                         device i2c 54 on end
 349                                                                 end
 350                                                                 chip drivers/generic/generic #dimm 1-2-1
 351                                                                         device i2c 55 on end
 352                                                                 end
 353                                                                 chip drivers/generic/generic #dimm 1-3-0
 354                                                                         device i2c 56 on end
 355                                                                 end
 356                                                                 chip drivers/generic/generic #dimm 1-3-1
 357                                                                         device i2c 57 on end
 358                                                                 end
 359                                                         end
 360                                                 end
 361                                         end # acpi
 362                                         device pci 1.5 off end
 363                                         device pci 1.6 off end
 364                                         register "ide0_enable" = "1"
 365                                         register "ide1_enable" = "1"
 366                                 end
 367                         end #  device pci 18.0
 368
 369                         device pci 18.0 on end
 370                         device pci 18.0 on end
 371                         device pci 18.1 on end
 372                         device pci 18.2 on end
 373                         device pci 18.3 on end
 374                 end
 375                 chip northbridge/amd/amdk8
 376                         device pci 19.0 on #  northbridge
 377                                 chip southbridge/amd/amd8151
 378                                         # the on/off keyword is mandatory
 379                                         device pci 0.0 on end
 380                                         device pci 1.0 on end
 381                                 end
 382                         end #  device pci 19.0
 383
 384                         device pci 19.0 on end
 385                         device pci 19.0 on end
 386                         device pci 19.1 on end
 387                         device pci 19.2 on end
 388                         device pci 19.3 on end
 389                 end
 390
 391
 392         end #pci_domain
 393 #        chip drivers/generic/debug
 394 #               device pnp 0.0 off end # chip name
 395 #                device pnp 0.1 on end # pci_regs_all
 396 #                device pnp 0.2 off end # mem
 397 #                device pnp 0.3 off end # cpuid
 398 #                device pnp 0.4 off end # smbus_regs_all
 399 #                device pnp 0.5 off end # dual core msr
 400 #                device pnp 0.6 off end # cache size
 401 #                device pnp 0.7 off end # tsc
 402 #       end
 403
 404 end
 405
 406