0abbcd28a9e98555d416b3f44373a4044efd5282
[coreboot.git] / src / mainboard / amd / serengeti_cheetah / Config.lb
1 ##
2 ## Compute the location and size of where this firmware image
3 ## (coreboot plus bootloader) will live in the boot rom chip.
4 ##
5 if USE_FAILOVER_IMAGE
6         default ROM_SECTION_SIZE   = FAILOVER_SIZE
7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
8 else
9     if USE_FALLBACK_IMAGE
10         default ROM_SECTION_SIZE   = FALLBACK_SIZE
11         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
12     else
13         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
14         default ROM_SECTION_OFFSET = 0
15     end
16 end
17
18 ##
19 ## Compute the start location and size size of
20 ## The coreboot bootloader.
21 ##
22 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
23 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
24
25 ##
26 ## Compute where this copy of coreboot will start in the boot rom
27 ##
28 default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
29
30 ##
31 ## Compute a range of ROM that can cached to speed up coreboot,
32 ## execution speed.
33 ##
34 ## XIP_ROM_SIZE must be a power of 2.
35 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
36 ##
37 default XIP_ROM_SIZE=65536
38
39 if USE_FAILOVER_IMAGE
40         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
41 else
42     if USE_FALLBACK_IMAGE
43         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
44     else
45         default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
46     end
47 end
48
49 arch i386 end 
50
51 ##
52 ## Build the objects we have code for in this directory.
53 ##
54
55 driver mainboard.o
56
57 #dir /drivers/si/3114
58
59 #needed by irq_tables and mptable and acpi_tables
60 object get_bus_conf.o
61
62 if HAVE_MP_TABLE 
63         object mptable.o 
64 end
65
66 if HAVE_PIRQ_TABLE 
67         object irq_tables.o 
68 end
69
70 #if HAVE_ACPI_TABLES
71 #       object acpi_tables.o
72 #       object fadt.o
73 #       if SB_HT_CHAIN_ON_BUS0
74 #               object dsdt_bus0.o
75 #       else
76 #               object dsdt.o
77 #       end
78 #       object ssdt.o
79 #       if ACPI_SSDTX_NUM
80 #                if SB_HT_CHAIN_ON_BUS0
81 #                 object ssdt2_bus0.o
82 #                else
83 #                 object ssdt2.o
84 #                end
85 #       end
86 #end
87
88 if HAVE_ACPI_TABLES
89         object acpi_tables.o
90         object fadt.o
91         makerule dsdt.c
92                 depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
93                 action  "iasl -p $(PWD)/dsdt_lb -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
94                 action  "mv dsdt_lb.hex dsdt.c"
95         end
96         object ./dsdt.o
97
98         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
99         
100         if ACPI_SSDTX_NUM
101             makerule ssdt2.c
102                         depends "$(MAINBOARD)/dx/pci2.asl"
103                         action  "iasl -p $(PWD)/pci2 -tc $(MAINBOARD)/dx/pci2.asl"
104                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
105                         action  "mv pci2.hex ssdt2.c"
106             end
107             object ./ssdt2.o
108             makerule ssdt3.c
109                         depends "$(MAINBOARD)/dx/pci3.asl"
110                         action  "iasl -p $(PWD)/pci3 -tc $(MAINBOARD)/dx/pci3.asl"
111                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
112                         action  "mv pci3.hex ssdt3.c"
113             end
114             object ./ssdt3.o
115             makerule ssdt4.c
116                         depends "$(MAINBOARD)/dx/pci4.asl"
117                         action  "iasl -p $(PWD)/pci4 -tc $(MAINBOARD)/dx/pci4.asl"
118                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
119                         action  "mv pci4.hex ssdt4.c"
120             end
121             object ./ssdt4.o
122         end
123 end
124
125         if CONFIG_USE_INIT
126                 # compile cache_as_ram.c to auto.o
127                 makerule ./cache_as_ram_auto.o
128                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
129                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
130                 end
131
132         else   
133                 #compile cache_as_ram.c to auto.inc 
134                 makerule ./cache_as_ram_auto.inc
135                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
136                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
137                         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
138                         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
139                 end
140         end
141
142 if USE_FAILOVER_IMAGE
143 else
144     if CONFIG_AP_CODE_IN_CAR
145         makerule ./apc_auto.o
146                 depends "$(MAINBOARD)/apc_auto.c option_table.h"
147                 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c $(MAINBOARD)/apc_auto.c -o $@"
148         end
149         ldscript /arch/i386/init/ldscript_apc.lb
150     end
151 end
152
153 ##
154 ## Build our 16 bit and 32 bit coreboot entry code
155 ##
156
157 if HAVE_FAILOVER_BOOT
158     if USE_FAILOVER_IMAGE
159         mainboardinit cpu/x86/16bit/entry16.inc
160         ldscript /cpu/x86/16bit/entry16.lds
161     end
162 else
163     if USE_FALLBACK_IMAGE
164         mainboardinit cpu/x86/16bit/entry16.inc
165         ldscript /cpu/x86/16bit/entry16.lds
166     end
167 end
168
169 mainboardinit cpu/x86/32bit/entry32.inc
170         if CONFIG_USE_INIT
171                 ldscript /cpu/x86/32bit/entry32.lds
172         end
173
174         if CONFIG_USE_INIT
175                 ldscript /cpu/amd/car/cache_as_ram.lds
176         end
177
178 ##
179 ## Build our reset vector (This is where coreboot is entered)
180 ##
181 if HAVE_FAILOVER_BOOT
182     if USE_FAILOVER_IMAGE 
183         mainboardinit cpu/x86/16bit/reset16.inc 
184         ldscript /cpu/x86/16bit/reset16.lds 
185     else
186         mainboardinit cpu/x86/32bit/reset32.inc 
187         ldscript /cpu/x86/32bit/reset32.lds 
188     end
189 else
190     if USE_FALLBACK_IMAGE 
191         mainboardinit cpu/x86/16bit/reset16.inc 
192         ldscript /cpu/x86/16bit/reset16.lds 
193     else
194         mainboardinit cpu/x86/32bit/reset32.inc 
195         ldscript /cpu/x86/32bit/reset32.lds 
196     end
197 end
198
199 ##
200 ## Include an id string (For safe flashing)
201 ##
202 mainboardinit arch/i386/lib/id.inc
203 ldscript /arch/i386/lib/id.lds
204
205         ##
206         ## Setup Cache-As-Ram
207         ##
208         mainboardinit cpu/amd/car/cache_as_ram.inc
209
210 ###
211 ### This is the early phase of coreboot startup 
212 ### Things are delicate and we test to see if we should
213 ### failover to another image.
214 ###
215 if HAVE_FAILOVER_BOOT
216     if USE_FAILOVER_IMAGE
217                 ldscript /arch/i386/lib/failover_failover.lds
218     end
219 else
220     if USE_FALLBACK_IMAGE
221                 ldscript /arch/i386/lib/failover.lds
222     end
223 end
224
225 ###
226 ### O.k. We aren't just an intermediary anymore!
227 ###
228
229 ##
230 ## Setup RAM
231 ##
232         if CONFIG_USE_INIT
233                 initobject cache_as_ram_auto.o
234         else
235                 mainboardinit ./cache_as_ram_auto.inc
236         end
237
238 ##
239 ## Include the secondary Configuration files 
240 ##
241 config chip.h
242
243 # sample config for amd/serengeti_cheetah 
244 chip northbridge/amd/amdk8/root_complex
245         device apic_cluster 0 on
246                 chip cpu/amd/socket_F
247                         device apic 0 on end
248                 end
249         end
250         device pci_domain 0 on
251                 chip northbridge/amd/amdk8
252                         device pci 18.0 on #  northbridge 
253                                 #  devices on link 0, link 0 == LDT 0
254                                 chip southbridge/amd/amd8132
255                                         # the on/off keyword is mandatory
256                                         device pci 0.0 on end
257                                         device pci 0.1 on end
258                                         device pci 1.0 on end
259                                         device pci 1.1 on end
260                                 end
261                                 chip southbridge/amd/amd8111
262                                         # this "device pci 0.0" is the parent the next one
263                                         # PCI bridge
264                                         device pci 0.0 on
265                                                 device pci 0.0 on end
266                                                 device pci 0.1 on end
267                                                 device pci 0.2 off end
268                                                 device pci 1.0 off end
269                                         end
270                                         device pci 1.0 on
271                                                 chip superio/winbond/w83627hf
272                                                         device pnp 2e.0 off #  Floppy
273                                                                 io 0x60 = 0x3f0
274                                                                 irq 0x70 = 6
275                                                                 drq 0x74 = 2
276                                                         end
277                                                         device pnp 2e.1 off #  Parallel Port
278                                                                 io 0x60 = 0x378
279                                                                 irq 0x70 = 7
280                                                         end
281                                                         device pnp 2e.2 on #  Com1
282                                                                 io 0x60 = 0x3f8
283                                                                 irq 0x70 = 4
284                                                         end
285                                                         device pnp 2e.3 off #  Com2
286                                                                 io 0x60 = 0x2f8
287                                                                 irq 0x70 = 3
288                                                         end
289                                                         device pnp 2e.5 on #  Keyboard
290                                                                 io 0x60 = 0x60
291                                                                 io 0x62 = 0x64
292                                                                 irq 0x70 = 1
293                                                                 irq 0x72 = 12
294                                                         end
295                                                         device pnp 2e.6 off #  CIR
296                                                                 io 0x60 = 0x100
297                                                         end
298                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
299                                                                 io 0x60 = 0x220
300                                                                 io 0x62 = 0x300
301                                                                 irq 0x70 = 9
302                                                         end                                             
303                                                         device pnp 2e.8 off end #  GPIO2
304                                                         device pnp 2e.9 off end #  GPIO3
305                                                         device pnp 2e.a off end #  ACPI
306                                                         device pnp 2e.b on #  HW Monitor
307                                                                 io 0x60 = 0x290
308                                                                 irq 0x70 = 5
309                                                         end
310                                                 end
311                                         end
312                                         device pci 1.1 on end
313                                         device pci 1.2 on end
314                                         device pci 1.3 on
315                                                 chip drivers/i2c/i2cmux # pca9556 smbus mux
316                                                         device i2c 18 on #0 pca9516 1
317                                                                 chip drivers/generic/generic #dimm 0-0-0
318                                                                         device i2c 50 on end
319                                                                 end
320                                                                 chip drivers/generic/generic #dimm 0-0-1
321                                                                         device i2c 51 on end
322                                                                 end
323                                                                 chip drivers/generic/generic #dimm 0-1-0
324                                                                         device i2c 52 on end
325                                                                 end
326                                                                 chip drivers/generic/generic #dimm 0-1-1
327                                                                         device i2c 53 on end
328                                                                 end
329                                                         end
330                                                         device i2c 18 on #1 pca9516 2
331                                                                 chip drivers/generic/generic #dimm 1-0-0
332                                                                         device i2c 50 on end
333                                                                 end
334                                                                 chip drivers/generic/generic #dimm 1-0-1
335                                                                         device i2c 51 on end
336                                                                 end
337                                                                 chip drivers/generic/generic #dimm 1-1-0
338                                                                         device i2c 52 on end
339                                                                 end
340                                                                 chip drivers/generic/generic #dimm 1-1-1
341                                                                         device i2c 53 on end
342                                                                 end
343                                                                 chip drivers/generic/generic #dimm 1-2-0
344                                                                         device i2c 54 on end
345                                                                 end
346                                                                 chip drivers/generic/generic #dimm 1-2-1
347                                                                         device i2c 55 on end
348                                                                 end
349                                                                 chip drivers/generic/generic #dimm 1-3-0
350                                                                         device i2c 56 on end
351                                                                 end
352                                                                 chip drivers/generic/generic #dimm 1-3-1
353                                                                         device i2c 57 on end
354                                                                 end
355                                                         end
356                                                 end
357                                         end # acpi
358                                         device pci 1.5 off end
359                                         device pci 1.6 off end
360                                         register "ide0_enable" = "1"
361                                         register "ide1_enable" = "1"
362                                 end
363                         end #  device pci 18.0
364
365                         device pci 18.0 on end
366                         device pci 18.0 on end  
367                         device pci 18.1 on end
368                         device pci 18.2 on end
369                         device pci 18.3 on end
370                 end
371                 chip northbridge/amd/amdk8
372                         device pci 19.0 on #  northbridge
373                                 chip southbridge/amd/amd8151
374                                         # the on/off keyword is mandatory
375                                         device pci 0.0 on end
376                                         device pci 1.0 on end
377                                 end
378                         end #  device pci 19.0
379
380                         device pci 19.0 on end
381                         device pci 19.0 on end
382                         device pci 19.1 on end
383                         device pci 19.2 on end
384                         device pci 19.3 on end
385                 end
386
387
388         end #pci_domain
389 #        chip drivers/generic/debug
390 #               device pnp 0.0 off end # chip name
391 #                device pnp 0.1 on end # pci_regs_all
392 #                device pnp 0.2 off end # mem
393 #                device pnp 0.3 off end # cpuid
394 #                device pnp 0.4 off end # smbus_regs_all
395 #                device pnp 0.5 off end # dual core msr
396 #                device pnp 0.6 off end # cache size
397 #                device pnp 0.7 off end # tsc
398 #       end
399
400 end
401
402