3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
12 uses CONFIG_MAX_PHYSICAL_CPUS
20 uses ROM_SECTION_OFFSET
21 uses CONFIG_ROM_STREAM
22 uses CONFIG_ROM_STREAM_START
30 uses LB_CKS_RANGE_START
33 uses MAINBOARD_PART_NUMBER
36 uses LINUXBIOS_EXTRA_VERSION
41 uses DEFAULT_CONSOLE_LOGLEVEL
42 uses MAXIMUM_CONSOLE_LOGLEVEL
43 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
44 uses CONFIG_CONSOLE_SERIAL8250
55 ## ROM_SIZE is the size of boot ROM that this board will use.
57 default ROM_SIZE=524288
60 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
62 default FALLBACK_SIZE=131072
65 ## Build code for the fallback boot
67 default HAVE_FALLBACK_BOOT=1
70 ## Build code to reset the motherboard from linuxBIOS
72 default HAVE_HARD_RESET=1
75 ## Funky hard reset implementation
77 default HARD_RESET_BUS=1
78 default HARD_RESET_DEVICE=4
79 default HARD_RESET_FUNCTION=0
82 ## Build code to export a programmable irq routing table
84 default HAVE_PIRQ_TABLE=1
85 default IRQ_SLOT_COUNT=9
88 ## Build code to export an x86 MP table
89 ## Useful for specifying IRQ routing values
91 default HAVE_MP_TABLE=1
94 ## Build code to export a CMOS option table
96 default HAVE_OPTION_TABLE=1
99 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
101 default LB_CKS_RANGE_START=49
102 default LB_CKS_RANGE_END=122
103 default LB_CKS_LOC=123
106 ## Build code for SMP support
107 ## Only worry about 2 micro processors
110 default CONFIG_MAX_CPUS=2
111 default CONFIG_MAX_PHYSICAL_CPUS=2
114 ## Build code to setup a generic IOAPIC
116 default CONFIG_IOAPIC=1
119 ## Clean up the motherboard id strings
121 default MAINBOARD_PART_NUMBER="SERENADE"
122 default MAINBOARD_VENDOR="AMD"
125 ### LinuxBIOS layout values
128 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
129 default ROM_IMAGE_SIZE = 65536
132 ## Use a small 8K stack
134 default STACK_SIZE=0x2000
137 ## Use a small 16K heap
139 default HEAP_SIZE=0x4000
142 ## Only use the option table in a normal image
144 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
147 ## LinuxBIOS C code runs at this location in RAM
149 default _RAMBASE=0x00004000
152 ## Load the payload from the ROM
154 default CONFIG_ROM_STREAM = 1
157 ### Defaults of options that you may want to override in the target config file
161 ## The default compiler
163 default CC="$(CROSS_COMPILE)gcc -m32"
167 ## The Serial Console
170 # To Enable the Serial Console
171 default CONFIG_CONSOLE_SERIAL8250=1
173 ## Select the serial console baud rate
174 default TTYS0_BAUD=115200
175 #default TTYS0_BAUD=57600
176 #default TTYS0_BAUD=38400
177 #default TTYS0_BAUD=19200
178 #default TTYS0_BAUD=9600
179 #default TTYS0_BAUD=4800
180 #default TTYS0_BAUD=2400
181 #default TTYS0_BAUD=1200
183 # Select the serial console base port
184 default TTYS0_BASE=0x3f8
186 # Select the serial protocol
187 # This defaults to 8 data bits, 1 stop bit, and no parity
188 default TTYS0_LCS=0x3
191 ### Select the linuxBIOS loglevel
193 ## EMERG 1 system is unusable
194 ## ALERT 2 action must be taken immediately
195 ## CRIT 3 critical conditions
196 ## ERR 4 error conditions
197 ## WARNING 5 warning conditions
198 ## NOTICE 6 normal but significant condition
199 ## INFO 7 informational
200 ## DEBUG 8 debug-level messages
201 ## SPEW 9 Way too many details
203 ## Request this level of debugging output
204 default DEFAULT_CONSOLE_LOGLEVEL=8
205 ## At a maximum only compile in this level of debugging
206 default MAXIMUM_CONSOLE_LOGLEVEL=8
209 ## Select power on after power fail setting
210 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"