GX2: Define the unused DIMM1 to 0xFF to make it obvious it is a bogus value.
[coreboot.git] / src / mainboard / amd / rumba / romstage.c
1 #include <stdint.h>
2 #include <device/pci_def.h>
3 #include <arch/io.h>
4 #include <device/pnp_def.h>
5 #include <arch/hlt.h>
6 #include <console/console.h>
7 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
8 #include "cpu/x86/bist.h"
9 #include "cpu/x86/msr.h"
10 #include <cpu/amd/gx2def.h>
11 #include <cpu/amd/geode_post_code.h>
12
13 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
14
15 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
16 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
17
18 #define DIMM0 0xA0
19 #define DIMM1 0xFF /* DIMM1 is not available/used on this board. */
20
21 static inline int spd_read_byte(unsigned device, unsigned address)
22 {
23         if (device != DIMM0)
24                 return 0xFF;    /* No DIMM1, don't even try. */
25
26         return smbus_read_byte(device, address);
27 }
28
29 #include "northbridge/amd/gx2/raminit.h"
30 #include "northbridge/amd/gx2/pll_reset.c"
31 #include "northbridge/amd/gx2/raminit.c"
32 #include "lib/generic_sdram.c"
33 #include "cpu/amd/model_gx2/cpureginit.c"
34 #include "cpu/amd/model_gx2/syspreinit.c"
35 #include "cpu/amd/model_lx/msrinit.c"
36
37 void main(unsigned long bist)
38 {
39         static const struct mem_controller memctrl [] = {
40                 {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
41         };
42
43         SystemPreInit();
44
45         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
46         uart_init();
47         console_init();
48
49         cs5536_early_setup();
50
51         /* Halt if there was a built in self test failure */
52         report_bist_failure(bist);
53
54         pll_reset();
55
56         cpuRegInit();
57         print_err("done cpuRegInit\n");
58
59         sdram_initialize(1, memctrl);
60
61         msr_init();
62
63         /* Check all of memory */
64         //ram_check(0x00000000, 640*1024);
65 }
66