d140878b799dbcef73755f72fbd3f5cf41df8e12
[coreboot.git] / src / mainboard / amd / pistachio / Kconfig
1 if BOARD_AMD_PISTACHIO
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_AM2
7         select DIMM_DDR2
8         select NORTHBRIDGE_AMD_AMDK8
9         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
10         select SOUTHBRIDGE_AMD_RS690
11         select SOUTHBRIDGE_AMD_SB600
12         select BOARD_HAS_FADT
13         select HAVE_BUS_CONFIG
14         select HAVE_OPTION_TABLE
15         select HAVE_PIRQ_TABLE
16         select HAVE_MP_TABLE
17         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
18         select WAIT_BEFORE_CPUS_INIT
19         select HAVE_ACPI_TABLES
20         select BOARD_ROMSIZE_KB_1024
21         select RAMINIT_SYSINFO
22         select QRANK_DIMM_SUPPORT
23         select SET_FIDVID
24
25 config MAINBOARD_DIR
26         string
27         default amd/pistachio
28
29 config DCACHE_RAM_BASE
30         hex
31         default 0xc8000
32
33 config DCACHE_RAM_SIZE
34         hex
35         default 0x08000
36
37 config DCACHE_RAM_GLOBAL_VAR_SIZE
38         hex
39         default 0x01000
40
41 config APIC_ID_OFFSET
42         hex
43         default 0x0
44
45 config MAINBOARD_PART_NUMBER
46         string
47         default "Pistachio"
48
49 config MAX_CPUS
50         int
51         default 2
52
53 config MAX_PHYSICAL_CPUS
54         int
55         default 1
56
57 config SB_HT_CHAIN_ON_BUS0
58         int
59         default 1
60
61 config HT_CHAIN_END_UNITID_BASE
62         hex
63         default 0x1
64
65 config HT_CHAIN_UNITID_BASE
66         hex
67         default 0x0
68
69 config IRQ_SLOT_COUNT
70         int
71         default 11
72
73 endif # BOARD_AMD_PISTACHIO