2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
24 #include <boot/coreboot_tables.h>
25 #include <cpu/x86/msr.h>
26 #include <cpu/amd/mtrr.h>
27 #include <device/pci_def.h>
30 #define ADT7461_ADDRESS 0x4C
31 #define ARA_ADDRESS 0x0C /* Alert Response Address */
32 #define SMBUS_IO_BASE 0x1000
34 extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
35 extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
37 #define ADT7461_read_byte(address) \
38 do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
39 #define ARA_read_byte(address) \
40 do_smbus_read_byte(SMBUS_IO_BASE, ARA_ADDRESS, address)
41 #define ADT7461_write_byte(address, val) \
42 do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
44 /********************************************************
45 * dbm690t uses a BCM5789 as on-board NIC.
46 * It has a pin named LOW_POWER to enable it into LOW POWER state.
47 * In order to run NIC, we should let it out of Low power state. This pin
48 * is controlled by sb600 GPM3.
49 * RRG4.2.3 GPM as GPIO
50 * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers:
51 * I/O C50, C51, C52, PM I/O94, 95, 96.
52 * RRG4.2.3.1 GPM pins as Input
53 * RRG4.2.3.2 GPM pins as Output
54 ********************************************************/
55 static void enable_onboard_nic()
59 printk_info("enable_onboard_nic.\n");
74 byte |= 0x80; /* 7:6=10 */
82 /********************************************************
83 * dbm690t uses SB600 GPIO9 to detect IDE_DMA66.
84 * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to
85 * get the cable type, 40 pin or 80 pin?
86 ********************************************************/
87 static void get_ide_dma66()
90 /*u32 sm_dev, ide_dev; */
91 device_t sm_dev, ide_dev;
94 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
97 pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
98 sm_dev->path.u.pci.devfn, 0xA9);
99 byte |= (1 << 5); /* Set Gpio9 as input */
100 pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
101 sm_dev->path.u.pci.devfn, 0xA9, byte);
103 ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
105 pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary,
106 ide_dev->path.u.pci.devfn, 0x56);
108 if ((1 << 5) & pci_cf8_conf1.
109 read8(&pbus, sm_dev->bus->secondary, sm_dev->path.u.pci.devfn,
111 byte |= 2 << 0; /* mode 2 */
113 byte |= 5 << 0; /* mode 5 */
114 pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary,
115 ide_dev->path.u.pci.devfn, 0x56, byte);
121 static void set_thermal_config()
129 ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */
130 ADT7461_write_byte(0x0C, 0x00); /* Local Temperature Low limit */
131 ADT7461_write_byte(0x0D, 0x50); /* External Temperature Hight limit High Byte */
132 ADT7461_write_byte(0x0E, 0x00); /* External Temperature Low limit High Byte */
134 ADT7461_write_byte(0x19, 0x55); /* External THERM limit */
135 ADT7461_write_byte(0x20, 0x55); /* Local THERM limit */
137 byte = ADT7461_read_byte(0x02); /* read status register to clear it */
138 ARA_read_byte(0x05); /* A hardware alert can only be cleared by the master sending an ARA as a read command */
139 printk_info("Init adt7461 end , status 0x02 %02x\n", byte);
141 /* sb600 settings for thermal config */
142 /* set SB600 GPIO 64 to GPIO with pull-up */
143 byte = pm2_ioread(0x42);
145 pm2_iowrite(0x42, byte);
147 /* set GPIO 64 to input */
148 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
150 pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
151 sm_dev->path.u.pci.devfn, 0x56);
153 pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
154 sm_dev->path.u.pci.devfn, 0x56, word);
156 /* set GPIO 64 internal pull-up */
157 byte = pm2_ioread(0xf0);
159 pm2_iowrite(0xf0, byte);
161 /* set Talert to be active low */
162 byte = pm_ioread(0x67);
164 pm_iowrite(0x67, byte);
166 /* set Talert to generate ACPI event */
167 byte = pm_ioread(0x3c);
169 pm_iowrite(0x3c, byte);
172 /* byte = pm_ioread(0x68);
174 * pm_iowrite(0x68, byte);
176 * byte = pm_ioread(0x55);
178 * pm_iowrite(0x55, byte);
180 * byte = pm_ioread(0x67);
181 * byte &= ~( 1 << 6);
182 * pm_iowrite(0x67, byte);
186 /*************************************************
187 * enable the dedicated function in dbm690t board.
188 * This function called early than rs690_enable.
189 *************************************************/
190 void dbm690t_enable(device_t dev)
192 struct mainboard_amd_dbm690t_config *mainboard =
193 (struct mainboard_amd_dbm690t_config *)dev->chip_info;
195 printk_info("Mainboard DBM690T Enable. dev=0x%x\n", dev);
197 #if (CONFIG_GFXUMA == 1)
200 /* TOP_MEM: the top of DRAM below 4G */
201 msr = rdmsr(TOP_MEM);
203 ("dbm690t_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
206 /* TOP_MEM2: the top of DRAM above 4G */
207 msr2 = rdmsr(TOP_MEM2);
209 ("dbm690t_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
213 case 0x10000000: /* 256M system memory */
214 uma_memory_size = 0x2000000; /* 32M recommended UMA */
217 case 0x18000000: /* 384M system memory */
218 uma_memory_size = 0x4000000; /* 64M recommended UMA */
221 case 0x20000000: /* 512M system memory */
222 uma_memory_size = 0x4000000; /* 64M recommended UMA */
225 default: /* 1GB and above system memory */
226 uma_memory_size = 0x8000000; /* 128M recommended UMA */
230 uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */
231 printk_info("dbm690t_enable: uma size 0x%08x, memory start 0x%08x\n",
232 uma_memory_size, uma_memory_start);
236 uma_memory_size = 0x8000000; /* 128M recommended UMA */
237 uma_memory_start = 0x38000000; /* 1GB system memory supposed */
240 enable_onboard_nic();
242 set_thermal_config();
246 * CONFIG_CHIP_NAME defined in Option.lb.
248 struct chip_operations mainboard_amd_dbm690t_ops = {
249 #if CONFIG_CHIP_NAME == 1
250 CHIP_NAME("AMD Dbm690t Mainboard")
252 .enable_dev = dbm690t_enable,