2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
24 Include ("routing.asl")
28 /* Routing is in System Bus scope */
32 /* Bus 0, Dev 0 - RS690 Host Controller */
33 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
34 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
35 Package(){0x0002FFFF, 0, INTC, 0 },
36 Package(){0x0002FFFF, 1, INTD, 0 },
37 Package(){0x0002FFFF, 2, INTA, 0 },
38 Package(){0x0002FFFF, 3, INTB, 0 },
39 /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
40 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
41 Package(){0x0004FFFF, 0, INTA, 0 },
42 Package(){0x0004FFFF, 1, INTB, 0 },
43 Package(){0x0004FFFF, 2, INTC, 0 },
44 Package(){0x0004FFFF, 3, INTD, 0 },
45 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
46 /* Package(){0x0005FFFF, 0, INTB, 0 }, */
47 /* Package(){0x0005FFFF, 1, INTC, 0 }, */
48 /* Package(){0x0005FFFF, 2, INTD, 0 }, */
49 /* Package(){0x0005FFFF, 3, INTA, 0 }, */
50 /* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
51 Package(){0x0006FFFF, 0, INTC, 0 },
52 Package(){0x0006FFFF, 1, INTD, 0 },
53 Package(){0x0006FFFF, 2, INTA, 0 },
54 Package(){0x0006FFFF, 3, INTB, 0 },
55 /* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */
56 Package(){0x0007FFFF, 0, INTD, 0 },
57 Package(){0x0007FFFF, 1, INTA, 0 },
58 Package(){0x0007FFFF, 2, INTB, 0 },
59 Package(){0x0007FFFF, 3, INTC, 0 },
60 /* Bus 0, Funct 8 - Southbridge port (normally hidden) */
63 /* Bus 0, Dev 17 - SATA controller #2 */
64 /* Bus 0, Dev 18 - SATA controller #1 */
65 Package(){0x0012FFFF, 1, INTA, 0 },
67 /* Bus 0, Dev 19 - USB: OHCI, funct 0-4; EHCI, funct 5 */
68 Package(){0x0013FFFF, 0, INTA, 0 },
69 Package(){0x0013FFFF, 1, INTB, 0 },
70 Package(){0x0013FFFF, 2, INTC, 0 },
71 Package(){0x0013FFFF, 3, INTD, 0 },
73 /* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:AC97 Audio;F6:AC97 Modem */
74 Package(){0x0014FFFF, 0, INTA, 0 },
75 Package(){0x0014FFFF, 1, INTB, 0 },
76 Package(){0x0014FFFF, 2, INTC, 0 },
77 Package(){0x0014FFFF, 3, INTD, 0 },
81 /* NB devices in APIC mode */
82 /* Bus 0, Dev 0 - RS690 Host Controller */
84 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
85 /* Package(){0x0001FFFF, 0, 0, 18 }, */
86 /* package(){0x0001FFFF, 1, 0, 19 }, */
88 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
89 Package(){0x0002FFFF, 0, 0, 18 },
90 /* Package(){0x0002FFFF, 1, 0, 19 }, */
91 /* Package(){0x0002FFFF, 2, 0, 16 }, */
92 /* Package(){0x0002FFFF, 3, 0, 17 }, */
94 /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
95 Package(){0x0003FFFF, 0, 0, 19 },
97 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
98 Package(){0x0004FFFF, 0, 0, 16 },
99 /* Package(){0x0004FFFF, 1, 0, 17 }, */
100 /* Package(){0x0004FFFF, 2, 0, 18 }, */
101 /* Package(){0x0004FFFF, 3, 0, 19 }, */
103 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
104 Package(){0x0005FFFF, 0, 0, 17 },
105 /* Package(){0x0005FFFF, 1, 0, 18 }, */
106 /* Package(){0x0005FFFF, 2, 0, 19 }, */
107 /* Package(){0x0005FFFF, 3, 0, 16 }, */
109 /* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
110 Package(){0x0006FFFF, 0, 0, 18 },
111 /* Package(){0x0006FFFF, 1, 0, 19 }, */
112 /* Package(){0x0006FFFF, 2, 0, 16 }, */
113 /* Package(){0x0006FFFF, 3, 0, 17 }, */
115 /* Bus 0, Dev 7 - PCIe Bridge for network card */
116 Package(){0x0007FFFF, 0, 0, 19 },
117 /* Package(){0x0007FFFF, 1, 0, 16 }, */
118 /* Package(){0x0007FFFF, 2, 0, 17 }, */
119 /* Package(){0x0007FFFF, 3, 0, 18 }, */
121 /* Bus 0, Funct 8 - Southbridge port (normally hidden) */
123 /* SB devices in APIC mode */
124 /* Bus 0, Dev 17 - SATA controller #2 */
125 /* Bus 0, Dev 18 - SATA controller #1 */
126 Package(){0x0012FFFF, 0, 0, 22 },
128 /* Bus 0, Dev 19 - USB: OHCI, funct 0-4; EHCI, funct 5 */
129 Package(){0x0013FFFF, 0, 0, 16 },
130 Package(){0x0013FFFF, 1, 0, 17 },
131 Package(){0x0013FFFF, 2, 0, 18 },
132 Package(){0x0013FFFF, 3, 0, 19 },
133 /* Package(){0x00130004, 2, 0, 18 }, */
134 /* Package(){0x00130005, 3, 0, 19 }, */
136 /* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:AC97 Audio; F6:AC97 Modem */
137 Package(){0x0014FFFF, 0, 0, 16 },
138 Package(){0x0014FFFF, 1, 0, 17 },
139 Package(){0x0014FFFF, 2, 0, 18 },
140 Package(){0x0014FFFF, 3, 0, 19 },
141 /* Package(){0x00140004, 2, 0, 18 }, */
142 /* Package(){0x00140004, 3, 0, 19 }, */
143 /* Package(){0x00140005, 1, 0, 17 }, */
144 /* Package(){0x00140006, 1, 0, 17 }, */
148 /* Internal graphics - RS690 VGA, Bus1, Dev5 */
149 Package(){0x0005FFFF, 0, INTA, 0 },
150 Package(){0x0005FFFF, 1, INTB, 0 },
151 Package(){0x0005FFFF, 2, INTC, 0 },
152 Package(){0x0005FFFF, 3, INTD, 0 },
155 Name(APR1, Package(){
156 /* Internal graphics - RS690 VGA, Bus1, Dev5 */
157 Package(){0x0005FFFF, 0, 0, 18 },
158 Package(){0x0005FFFF, 1, 0, 19 },
159 /* Package(){0x0005FFFF, 2, 0, 20 }, */
160 /* Package(){0x0005FFFF, 3, 0, 17 }, */
164 /* The external GFX - Hooked to PCIe slot 2 */
165 Package(){0x0000FFFF, 0, INTC, 0 },
166 Package(){0x0000FFFF, 1, INTD, 0 },
167 Package(){0x0000FFFF, 2, INTA, 0 },
168 Package(){0x0000FFFF, 3, INTB, 0 },
171 Name(APS2, Package(){
172 /* The external GFX - Hooked to PCIe slot 2 */
173 Package(){0x0000FFFF, 0, 0, 18 },
174 Package(){0x0000FFFF, 1, 0, 19 },
175 Package(){0x0000FFFF, 2, 0, 16 },
176 Package(){0x0000FFFF, 3, 0, 17 },
180 /* PCIe slot - Hooked to PCIe slot 4 */
181 Package(){0x0000FFFF, 0, INTA, 0 },
182 Package(){0x0000FFFF, 1, INTB, 0 },
183 Package(){0x0000FFFF, 2, INTC, 0 },
184 Package(){0x0000FFFF, 3, INTD, 0 },
187 Name(APS4, Package(){
188 /* PCIe slot - Hooked to PCIe slot 4 */
189 Package(){0x0000FFFF, 0, 0, 16 },
190 Package(){0x0000FFFF, 1, 0, 17 },
191 Package(){0x0000FFFF, 2, 0, 18 },
192 Package(){0x0000FFFF, 3, 0, 19 },
196 /* PCIe slot - Hooked to PCIe slot 5 */
197 Package(){0x0000FFFF, 0, INTB, 0 },
198 Package(){0x0000FFFF, 1, INTC, 0 },
199 Package(){0x0000FFFF, 2, INTD, 0 },
200 Package(){0x0000FFFF, 3, INTA, 0 },
203 Name(APS5, Package(){
204 /* PCIe slot - Hooked to PCIe slot 5 */
205 Package(){0x0000FFFF, 0, 0, 17 },
206 Package(){0x0000FFFF, 1, 0, 18 },
207 Package(){0x0000FFFF, 2, 0, 19 },
208 Package(){0x0000FFFF, 3, 0, 16 },
212 /* PCIe slot - Hooked to PCIe slot 6 */
213 Package(){0x0000FFFF, 0, INTC, 0 },
214 Package(){0x0000FFFF, 1, INTD, 0 },
215 Package(){0x0000FFFF, 2, INTA, 0 },
216 Package(){0x0000FFFF, 3, INTB, 0 },
219 Name(APS6, Package(){
220 /* PCIe slot - Hooked to PCIe slot 6 */
221 Package(){0x0000FFFF, 0, 0, 18 },
222 Package(){0x0000FFFF, 1, 0, 19 },
223 Package(){0x0000FFFF, 2, 0, 16 },
224 Package(){0x0000FFFF, 3, 0, 17 },
228 /* The onboard Ethernet chip - Hooked to PCIe slot 7 */
229 Package(){0x0000FFFF, 0, INTD, 0 },
230 Package(){0x0000FFFF, 1, INTA, 0 },
231 Package(){0x0000FFFF, 2, INTB, 0 },
232 Package(){0x0000FFFF, 3, INTC, 0 },
235 Name(APS7, Package(){
236 /* The onboard Ethernet chip - Hooked to PCIe slot 7 */
237 Package(){0x0000FFFF, 0, 0, 19 },
238 Package(){0x0000FFFF, 1, 0, 16 },
239 Package(){0x0000FFFF, 2, 0, 17 },
240 Package(){0x0000FFFF, 3, 0, 18 },
243 Name(PCIB, Package(){
244 /* PCI slots: slot 0, slot 1, slot 2 behind Dev14, Fun4. */
245 Package(){0x0005FFFF, 0, 0, 0x14 },
246 Package(){0x0005FFFF, 1, 0, 0x15 },
247 Package(){0x0005FFFF, 2, 0, 0x16 },
248 Package(){0x0005FFFF, 3, 0, 0x17 },
249 Package(){0x0006FFFF, 0, 0, 0x15 },
250 Package(){0x0006FFFF, 1, 0, 0x16 },
251 Package(){0x0006FFFF, 2, 0, 0x17 },
252 Package(){0x0006FFFF, 3, 0, 0x14 },
253 Package(){0x0007FFFF, 0, 0, 0x16 },
254 Package(){0x0007FFFF, 1, 0, 0x17 },
255 Package(){0x0007FFFF, 2, 0, 0x14 },
256 Package(){0x0007FFFF, 3, 0, 0x15 },