src/mainboard/amd/dbm690t/acpi/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /* DefinitionBlock Statement */
  21 DefinitionBlock (
  22         "DSDT.AML",           /* Output filename */
  23         "DSDT",                 /* Signature */
  24         0x01,                    /* DSDT Revision */
  25         "AMD   ",               /* OEMID */
  26         "DBM690T ",          /* TABLE ID */
  27         0x00010001      /* OEM Revision */
  28         )
  29 {       /* Start of ASL file */
  30         /* Include ("debug.asl") */             /* Include global debug methods if needed */
  31
  32         /* Data to be patched by the BIOS during POST */
  33         /* FIXME the patching is not done yet! */
  34         /* Memory related values */
  35         Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */
  36         Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
  37         Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
  38         Name(PBLN, 0x0) /* Length of BIOS area */
  39
  40         Name(PCBA, 0xE0000000)  /* Base address of PCIe config space */
  41         Name(HPBA, 0xFED00000)  /* Base address of HPET table */
  42
  43         Name(SSFG, 0x0D)                /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
  44
  45         /* USB overcurrent mapping pins.   */
  46         Name(UOM0, 0)
  47         Name(UOM1, 2)
  48         Name(UOM2, 0)
  49         Name(UOM3, 7)
  50         Name(UOM4, 2)
  51         Name(UOM5, 2)
  52         Name(UOM6, 6)
  53         Name(UOM7, 2)
  54         Name(UOM8, 6)
  55         Name(UOM9, 6)
  56
  57         /*
  58          * Processor Object
  59          *
  60          */
  61         Scope (\_PR) {          /* define processor scope */
  62                 Processor(
  63                         CPU0,           /* name space name */
  64                         0,              /* Unique number for this processor */
  65                         0x808,          /* PBLK system I/O address !hardcoded! */
  66                         0x06            /* PBLKLEN for boot processor */
  67                         ) {
  68                         Include ("cpstate.asl")
  69                 }
  70
  71                 Processor(
  72                         CPU1,           /* name space name */
  73                         1,              /* Unique number for this processor */
  74                         0x0000,         /* PBLK system I/O address !hardcoded! */
  75                         0x00            /* PBLKLEN for boot processor */
  76                         ) {
  77                         Include ("cpstate.asl")
  78                 }
  79
  80                 Processor(
  81                         CPU2,           /* name space name */
  82                         2,              /* Unique number for this processor */
  83                         0x0000,         /* PBLK system I/O address !hardcoded! */
  84                         0x00            /* PBLKLEN for boot processor */
  85                         ) {
  86                         Include ("cpstate.asl")
  87                 }
  88
  89                 Processor(
  90                         CPU3,           /* name space name */
  91                         3,              /* Unique number for this processor */
  92                         0x0000,         /* PBLK system I/O address !hardcoded! */
  93                         0x00            /* PBLKLEN for boot processor */
  94                         ) {
  95                         Include ("cpstate.asl")
  96                 }
  97         } /* End _PR scope */
  98
  99         /* Some global data */
 100         Name(OSTP, 3)           /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 101         Name(OSV, Ones) /* Assume nothing */
 102         Name(PMOD, One) /* Assume APIC */
 103
 104         /* PIC IRQ mapping registers, C00h-C01h */
 105         OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)
 106                 Field(PRQM, ByteAcc, NoLock, Preserve) {
 107                 PRQI, 0x00000008,
 108                 PRQD, 0x00000008,  /* Offset: 1h */
 109         }
 110         IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
 111                 PINA, 0x00000008,       /* Index 0  */
 112                 PINB, 0x00000008,       /* Index 1 */
 113                 PINC, 0x00000008,       /* Index 2 */
 114                 PIND, 0x00000008,       /* Index 3 */
 115                 AINT, 0x00000008,       /* Index 4 */
 116                 SINT, 0x00000008,       /*  Index 5 */
 117                 , 0x00000008,                /* Index 6 */
 118                 AAUD, 0x00000008,       /* Index 7 */
 119                 AMOD, 0x00000008,       /* Index 8 */
 120                 PINE, 0x00000008,       /* Index 9 */
 121                 PINF, 0x00000008,       /* Index A */
 122                 PING, 0x00000008,       /* Index B */
 123                 PINH, 0x00000008,       /* Index C */
 124         }
 125
 126         /* PCI Error control register */
 127         OperationRegion(PERC, SystemIO, 0x00000C14, 0x00000001)
 128                 Field(PERC, ByteAcc, NoLock, Preserve) {
 129                 SENS, 0x00000001,
 130                 PENS, 0x00000001,
 131                 SENE, 0x00000001,
 132                 PENE, 0x00000001,
 133         }
 134
 135         /* Client Management index/data registers */
 136         OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002)
 137                 Field(CMT, ByteAcc, NoLock, Preserve) {
 138                 CMTI,      8,
 139                 /* Client Management Data register */
 140                 G64E,   1,
 141                 G64O,      1,
 142                 G32O,      2,
 143                 ,       2,
 144                 GPSL,     2,
 145         }
 146
 147         /* GPM Port register */
 148         OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001)
 149                 Field(GPT, ByteAcc, NoLock, Preserve) {
 150                 GPB0,1,
 151                 GPB1,1,
 152                 GPB2,1,
 153                 GPB3,1,
 154                 GPB4,1,
 155                 GPB5,1,
 156                 GPB6,1,
 157                 GPB7,1,
 158         }
 159
 160         /* Flash ROM program enable register */
 161         OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001)
 162                 Field(FRE, ByteAcc, NoLock, Preserve) {
 163                 ,     0x00000006,
 164                 FLRE, 0x00000001,
 165         }
 166
 167         /* PM2 index/data registers */
 168         OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002)
 169                 Field(PM2R, ByteAcc, NoLock, Preserve) {
 170                 PM2I, 0x00000008,
 171                 PM2D, 0x00000008,
 172         }
 173
 174         /* Power Management I/O registers */
 175         OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002)
 176                 Field(PIOR, ByteAcc, NoLock, Preserve) {
 177                 PIOI, 0x00000008,
 178                 PIOD, 0x00000008,
 179         }
 180         IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) {
 181                 Offset(0x00),   /* MiscControl */
 182                 , 1,
 183                 T1EE, 1,
 184                 T2EE, 1,
 185                 Offset(0x01),   /* MiscStatus */
 186                 , 1,
 187                 T1E, 1,
 188                 T2E, 1,
 189                 Offset(0x04),   /* SmiWakeUpEventEnable3 */
 190                 , 7,
 191                 SSEN, 1,
 192                 Offset(0x07),   /* SmiWakeUpEventStatus3 */
 193                 , 7,
 194                 CSSM, 1,
 195                 Offset(0x10),   /* AcpiEnable */
 196                 , 6,
 197                 PWDE, 1,
 198                 Offset(0x1C),   /* ProgramIoEnable */
 199                 , 3,
 200                 MKME, 1,
 201                 IO3E, 1,
 202                 IO2E, 1,
 203                 IO1E, 1,
 204                 IO0E, 1,
 205                 Offset(0x1D),   /* IOMonitorStatus */
 206                 , 3,
 207                 MKMS, 1,
 208                 IO3S, 1,
 209                 IO2S, 1,
 210                 IO1S, 1,
 211                 IO0S,1,
 212                 Offset(0x20),   /* AcpiPmEvtBlk */
 213                 APEB, 16,
 214                 Offset(0x36),   /* GEvtLevelConfig */
 215                 , 6,
 216                 ELC6, 1,
 217                 ELC7, 1,
 218                 Offset(0x37),   /* GPMLevelConfig0 */
 219                 , 3,
 220                 PLC0, 1,
 221                 PLC1, 1,
 222                 PLC2, 1,
 223                 PLC3, 1,
 224                 PLC8, 1,
 225                 Offset(0x38),   /* GPMLevelConfig1 */
 226                 , 1,
 227                  PLC4, 1,
 228                  PLC5, 1,
 229                 , 1,
 230                  PLC6, 1,
 231                  PLC7, 1,
 232                 Offset(0x3B),   /* PMEStatus1 */
 233                 GP0S, 1,
 234                 GM4S, 1,
 235                 GM5S, 1,
 236                 APS, 1,
 237                 GM6S, 1,
 238                 GM7S, 1,
 239                 GP2S, 1,
 240                 STSS, 1,
 241                 Offset(0x55),   /* SoftPciRst */
 242                 SPRE, 1,
 243                 , 1,
 244                 , 1,
 245                 PNAT, 1,
 246                 PWMK, 1,
 247                 PWNS, 1,
 248
 249                 /*      Offset(0x61), */        /*  Options_1 */
 250                 /*              ,7,  */
 251                 /*              R617,1, */
 252
 253                 Offset(0x65),   /* UsbPMControl */
 254                 , 4,
 255                 URRE, 1,
 256                 Offset(0x68),   /* MiscEnable68 */
 257                 , 3,
 258                 TMTE, 1,
 259                 , 1,
 260                 Offset(0x92),   /* GEVENTIN */
 261                 , 7,
 262                 E7IS, 1,
 263                 Offset(0x96),   /* GPM98IN */
 264                 G8IS, 1,
 265                 G9IS, 1,
 266                 Offset(0x9A),   /* EnhanceControl */
 267                 ,7,
 268                 HPDE, 1,
 269                 Offset(0xA8),   /* PIO7654Enable */
 270                 IO4E, 1,
 271                 IO5E, 1,
 272                 IO6E, 1,
 273                 IO7E, 1,
 274                 Offset(0xA9),   /* PIO7654Status */
 275                 IO4S, 1,
 276                 IO5S, 1,
 277                 IO6S, 1,
 278                 IO7S, 1,
 279         }
 280
 281         /* PM1 Event Block
 282         * First word is PM1_Status, Second word is PM1_Enable
 283         */
 284         OperationRegion(P1EB, SystemIO, APEB, 0x04)
 285                 Field(P1EB, ByteAcc, NoLock, Preserve) {
 286                 TMST, 1,
 287                 ,    3,
 288                 BMST,    1,
 289                 GBST,   1,
 290                 Offset(0x01),
 291                 PBST, 1,
 292                 , 1,
 293                 RTST, 1,
 294                 , 3,
 295                 PWST, 1,
 296                 SPWS, 1,
 297                 Offset(0x02),
 298                 TMEN, 1,
 299                 , 4,
 300                 GBEN, 1,
 301                 Offset(0x03),
 302                 PBEN, 1,
 303                 , 1,
 304                 RTEN, 1,
 305                 , 3,
 306                 PWDA, 1,
 307         }
 308
 309         Scope(\_SB) {
 310
 311                 /* PCIe Configuration Space for 16 busses */
 312                 OperationRegion(PCFG, SystemMemory, PCBA, 0x01000000) /* Each bus consumes 1MB */
 313                         Field(PCFG, ByteAcc, NoLock, Preserve) {
 314                         /* Byte offsets are computed using the following technique:
 315                            * ((bus number + 1) * ((device number * 8) * 4096)) + register offset
 316                            * The 8 comes from 8 functions per device, and 4096 bytes per function config space
 317                         */
 318                         Offset(0x00090024),     /* Byte offset to SATA register 24h - Bus 0, Device 18, Function 0 */
 319                         STB5, 32,
 320                         Offset(0x00098042),     /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */
 321                         PT0D, 1,
 322                         PT1D, 1,
 323                         PT2D, 1,
 324                         PT3D, 1,
 325                         PT4D, 1,
 326                         PT5D, 1,
 327                         PT6D, 1,
 328                         PT7D, 1,
 329                         PT8D, 1,
 330                         PT9D, 1,
 331                         Offset(0x000A0004),     /* Byte offset to SMBUS register 4h - Bus 0, Device 20, Function 0 */
 332                         SBIE, 1,
 333                         SBME, 1,
 334                         Offset(0x000A0008),     /* Byte offset to SMBUS register 8h - Bus 0, Device 20, Function 0 */
 335                         SBRI, 8,
 336                         Offset(0x000A0014),     /* Byte offset to SMBUS register 14h - Bus 0, Device 20, Function 0 */
 337                         SBB1, 32,
 338                         Offset(0x000A0078),     /* Byte offset to SMBUS register 78h - Bus 0, Device 20, Function 0 */
 339                         ,14,
 340                         P92E, 1,                /* Port92 decode enable */
 341                 }
 342
 343                 OperationRegion(SB5, SystemMemory, STB5, 0x1000)
 344                         Field(SB5, AnyAcc, NoLock, Preserve)
 345                         {
 346                         /* Port 0 */
 347                         Offset(0x120),          /* Port 0 Task file status */
 348                         P0ER, 1,
 349                         , 2,
 350                         P0DQ, 1,
 351                         , 3,
 352                         P0BY, 1,
 353                         Offset(0x128),          /* Port 0 Serial ATA status */
 354                         P0DD, 4,
 355                         , 4,
 356                         P0IS, 4,
 357                         Offset(0x12C),          /* Port 0 Serial ATA control */
 358                         P0DI, 4,
 359                         Offset(0x130),          /* Port 0 Serial ATA error */
 360                         , 16,
 361                         P0PR, 1,
 362
 363                         /* Port 1 */
 364                         offset(0x1A0),          /* Port 1 Task file status */
 365                         P1ER, 1,
 366                         , 2,
 367                         P1DQ, 1,
 368                         , 3,
 369                         P1BY, 1,
 370                         Offset(0x1A8),          /* Port 1 Serial ATA status */
 371                         P1DD, 4,
 372                         , 4,
 373                         P1IS, 4,
 374                         Offset(0x1AC),          /* Port 1 Serial ATA control */
 375                         P1DI, 4,
 376                         Offset(0x1B0),          /* Port 1 Serial ATA error */
 377                         , 16,
 378                         P1PR, 1,
 379
 380                         /* Port 2 */
 381                         Offset(0x220),          /* Port 2 Task file status */
 382                         P2ER, 1,
 383                         , 2,
 384                         P2DQ, 1,
 385                         , 3,
 386                         P2BY, 1,
 387                         Offset(0x228),          /* Port 2 Serial ATA status */
 388                         P2DD, 4,
 389                         , 4,
 390                         P2IS, 4,
 391                         Offset(0x22C),          /* Port 2 Serial ATA control */
 392                         P2DI, 4,
 393                         Offset(0x230),          /* Port 2 Serial ATA error */
 394                         , 16,
 395                         P2PR, 1,
 396
 397                         /* Port 3 */
 398                         Offset(0x2A0),          /* Port 3 Task file status */
 399                         P3ER, 1,
 400                         , 2,
 401                         P3DQ, 1,
 402                         , 3,
 403                         P3BY, 1,
 404                         Offset(0x2A8),          /* Port 3 Serial ATA status */
 405                         P3DD, 4,
 406                         , 4,
 407                         P3IS, 4,
 408                         Offset(0x2AC),          /* Port 3 Serial ATA control */
 409                         P3DI, 4,
 410                         Offset(0x2B0),          /* Port 3 Serial ATA error */
 411                         , 16,
 412                         P3PR, 1,
 413                 }
 414         }
 415
 416         Include ("routing.asl")
 417
 418         Scope(\_SB) {
 419
 420                 Method(CkOT, 0){
 421
 422                         if(LNotEqual(OSTP, Ones)) {Return(OSTP)}        /* OS version was already detected */
 423
 424                         if(CondRefOf(\_OSI,Local1))
 425                         {
 426                                 Store(1, OSTP)                /* Assume some form of XP */
 427                                 if (\_OSI("Windows 2006"))      /* Vista */
 428                                 {
 429                                         Store(2, OSTP)
 430                                 }
 431                         } else {
 432                                 If(WCMP(\_OS,"Linux")) {
 433                                         Store(3, OSTP)            /* Linux */
 434                                 } Else {
 435                                         Store(4, OSTP)            /* Gotta be WinCE */
 436                                 }
 437                         }
 438                         Return(OSTP)
 439                 }
 440
 441                 Method(_PIC, 0x01, NotSerialized)
 442                 {
 443                         If (Arg0)
 444                         {
 445                                 \_SB.CIRQ()
 446                         }
 447                         Store(Arg0, PMOD)
 448                 }
 449
 450                 Method(CIRQ, 0x00, NotSerialized)
 451                 {
 452                         Store(0, PINA)
 453                         Store(0, PINB)
 454                         Store(0, PINC)
 455                         Store(0, PIND)
 456                         Store(0, PINE)
 457                         Store(0, PINF)
 458                         Store(0, PING)
 459                         Store(0, PINH)
 460                 }
 461
 462                 Name(IRQB, ResourceTemplate(){
 463                         IRQ(Level,ActiveLow,Shared){15}
 464                 })
 465
 466                 Name(IRQP, ResourceTemplate(){
 467                         IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 7, 10, 11, 12, 15}
 468                 })
 469
 470                 Name(PITF, ResourceTemplate(){
 471                         IRQ(Level,ActiveLow,Exclusive){9}
 472                 })
 473
 474                 Device(INTA) {
 475                         Name(_HID, EISAID("PNP0C0F"))
 476                         Name(_UID, 1)
 477
 478                         Method(_STA, 0) {
 479                                 if (PINA) {
 480                                         Return(0x0B) /* sata is invisible */
 481                                 } else {
 482                                         Return(0x09) /* sata is disabled */
 483                                 }
 484                         } /* End Method(_SB.INTA._STA) */
 485
 486                         Method(_DIS ,0) {
 487                                 /* DBGO("\\_SB\\LNKA\\_DIS\n") */
 488                                 Store(0, PINA)
 489                         } /* End Method(_SB.INTA._DIS) */
 490
 491                         Method(_PRS ,0) {
 492                                 /* DBGO("\\_SB\\LNKA\\_PRS\n") */
 493                                 Return(IRQP)
 494                         } /* Method(_SB.INTA._PRS) */
 495
 496                         Method(_CRS ,0) {
 497                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 498                                 CreateWordField(IRQB, 0x1, IRQN)
 499                                 ShiftLeft(1, PINA, IRQN)
 500                                 Return(IRQB)
 501                         } /* Method(_SB.INTA._CRS) */
 502
 503                         Method(_SRS, 1) {
 504                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 505                                 CreateWordField(ARG0, 1, IRQM)
 506
 507                                 /* Use lowest available IRQ */
 508                                 FindSetRightBit(IRQM, Local0)
 509                                 if (Local0) {
 510                                         Decrement(Local0)
 511                                 }
 512                                 Store(Local0, PINA)
 513                         } /* End Method(_SB.INTA._SRS) */
 514                 } /* End Device(INTA) */
 515
 516                 Device(INTB) {
 517                         Name(_HID, EISAID("PNP0C0F"))
 518                         Name(_UID, 2)
 519
 520                         Method(_STA, 0) {
 521                                 if (PINB) {
 522                                         Return(0x0B) /* sata is invisible */
 523                                 } else {
 524                                         Return(0x09) /* sata is disabled */
 525                                 }
 526                         } /* End Method(_SB.INTB._STA) */
 527
 528                         Method(_DIS ,0) {
 529                                 /* DBGO("\\_SB\\LNKB\\_DIS\n") */
 530                                 Store(0, PINB)
 531                         } /* End Method(_SB.INTB._DIS) */
 532
 533                         Method(_PRS ,0) {
 534                                 /* DBGO("\\_SB\\LNKB\\_PRS\n") */
 535                                 Return(IRQP)
 536                         } /* Method(_SB.INTB._PRS) */
 537
 538                         Method(_CRS ,0) {
 539                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 540                                 CreateWordField(IRQB, 0x1, IRQN)
 541                                 ShiftLeft(1, PINB, IRQN)
 542                                 Return(IRQB)
 543                         } /* Method(_SB.INTB._CRS) */
 544
 545                         Method(_SRS, 1) {
 546                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 547                                 CreateWordField(ARG0, 1, IRQM)
 548
 549                                 /* Use lowest available IRQ */
 550                                 FindSetRightBit(IRQM, Local0)
 551                                 if (Local0) {
 552                                         Decrement(Local0)
 553                                 }
 554                                 Store(Local0, PINB)
 555                         } /* End Method(_SB.INTB._SRS) */
 556                 } /* End Device(INTB)  */
 557
 558                 Device(INTC) {
 559                         Name(_HID, EISAID("PNP0C0F"))
 560                         Name(_UID, 3)
 561
 562                         Method(_STA, 0) {
 563                                 if (PINC) {
 564                                         Return(0x0B) /* sata is invisible */
 565                                 } else {
 566                                         Return(0x09) /* sata is disabled */
 567                                 }
 568                         } /* End Method(_SB.INTC._STA) */
 569
 570                         Method(_DIS ,0) {
 571                                 /* DBGO("\\_SB\\LNKC\\_DIS\n") */
 572                                 Store(0, PINC)
 573                         } /* End Method(_SB.INTC._DIS) */
 574
 575                         Method(_PRS ,0) {
 576                                 /* DBGO("\\_SB\\LNKC\\_PRS\n") */
 577                                 Return(IRQP)
 578                         } /* Method(_SB.INTC._PRS) */
 579
 580                         Method(_CRS ,0) {
 581                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 582                                 CreateWordField(IRQB, 0x1, IRQN)
 583                                 ShiftLeft(1, PINC, IRQN)
 584                                 Return(IRQB)
 585                         } /* Method(_SB.INTC._CRS) */
 586
 587                         Method(_SRS, 1) {
 588                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 589                                 CreateWordField(ARG0, 1, IRQM)
 590
 591                                 /* Use lowest available IRQ */
 592                                 FindSetRightBit(IRQM, Local0)
 593                                 if (Local0) {
 594                                         Decrement(Local0)
 595                                 }
 596                                 Store(Local0, PINC)
 597                         } /* End Method(_SB.INTC._SRS) */
 598                 } /* End Device(INTC)  */
 599
 600                 Device(INTD) {
 601                         Name(_HID, EISAID("PNP0C0F"))
 602                         Name(_UID, 4)
 603
 604                         Method(_STA, 0) {
 605                                 if (PIND) {
 606                                         Return(0x0B) /* sata is invisible */
 607                                 } else {
 608                                         Return(0x09) /* sata is disabled */
 609                                 }
 610                         } /* End Method(_SB.INTD._STA) */
 611
 612                         Method(_DIS ,0) {
 613                                 /* DBGO("\\_SB\\LNKD\\_DIS\n") */
 614                                 Store(0, PIND)
 615                         } /* End Method(_SB.INTD._DIS) */
 616
 617                         Method(_PRS ,0) {
 618                                 /* DBGO("\\_SB\\LNKD\\_PRS\n") */
 619                                 Return(IRQP)
 620                         } /* Method(_SB.INTD._PRS) */
 621
 622                         Method(_CRS ,0) {
 623                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 624                                 CreateWordField(IRQB, 0x1, IRQN)
 625                                 ShiftLeft(1, PIND, IRQN)
 626                                 Return(IRQB)
 627                         } /* Method(_SB.INTD._CRS) */
 628
 629                         Method(_SRS, 1) {
 630                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 631                                 CreateWordField(ARG0, 1, IRQM)
 632
 633                                 /* Use lowest available IRQ */
 634                                 FindSetRightBit(IRQM, Local0)
 635                                 if (Local0) {
 636                                         Decrement(Local0)
 637                                 }
 638                                 Store(Local0, PIND)
 639                         } /* End Method(_SB.INTD._SRS) */
 640                 } /* End Device(INTD)  */
 641
 642                 Device(INTE) {
 643                         Name(_HID, EISAID("PNP0C0F"))
 644                         Name(_UID, 5)
 645
 646                         Method(_STA, 0) {
 647                                 if (PINE) {
 648                                         Return(0x0B) /* sata is invisible */
 649                                 } else {
 650                                         Return(0x09) /* sata is disabled */
 651                                 }
 652                         } /* End Method(_SB.INTE._STA) */
 653
 654                         Method(_DIS ,0) {
 655                                 /* DBGO("\\_SB\\LNKE\\_DIS\n") */
 656                                 Store(0, PINE)
 657                         } /* End Method(_SB.INTE._DIS) */
 658
 659                         Method(_PRS ,0) {
 660                                 /* DBGO("\\_SB\\LNKE\\_PRS\n") */
 661                                 Return(IRQP)
 662                         } /* Method(_SB.INTE._PRS) */
 663
 664                         Method(_CRS ,0) {
 665                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 666                                 CreateWordField(IRQB, 0x1, IRQN)
 667                                 ShiftLeft(1, PINE, IRQN)
 668                                 Return(IRQB)
 669                         } /* Method(_SB.INTE._CRS) */
 670
 671                         Method(_SRS, 1) {
 672                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 673                                 CreateWordField(ARG0, 1, IRQM)
 674
 675                                 /* Use lowest available IRQ */
 676                                 FindSetRightBit(IRQM, Local0)
 677                                 if (Local0) {
 678                                         Decrement(Local0)
 679                                 }
 680                                 Store(Local0, PINE)
 681                         } /* End Method(_SB.INTE._SRS) */
 682                 } /* End Device(INTE)  */
 683
 684                 Device(INTF) {
 685                         Name(_HID, EISAID("PNP0C0F"))
 686                         Name(_UID, 6)
 687
 688                         Method(_STA, 0) {
 689                                 if (PINF) {
 690                                         Return(0x0B) /* sata is invisible */
 691                                 } else {
 692                                         Return(0x09) /* sata is disabled */
 693                                 }
 694                         } /* End Method(_SB.INTF._STA) */
 695
 696                         Method(_DIS ,0) {
 697                                 /* DBGO("\\_SB\\LNKF\\_DIS\n") */
 698                                 Store(0, PINF)
 699                         } /* End Method(_SB.INTF._DIS) */
 700
 701                         Method(_PRS ,0) {
 702                                 /* DBGO("\\_SB\\LNKF\\_PRS\n") */
 703                                 Return(PITF)
 704                         } /* Method(_SB.INTF._PRS) */
 705
 706                         Method(_CRS ,0) {
 707                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 708                                 CreateWordField(IRQB, 0x1, IRQN)
 709                                 ShiftLeft(1, PINF, IRQN)
 710                                 Return(IRQB)
 711                         } /* Method(_SB.INTF._CRS) */
 712
 713                         Method(_SRS, 1) {
 714                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 715                                 CreateWordField(ARG0, 1, IRQM)
 716
 717                                 /* Use lowest available IRQ */
 718                                 FindSetRightBit(IRQM, Local0)
 719                                 if (Local0) {
 720                                         Decrement(Local0)
 721                                 }
 722                                 Store(Local0, PINF)
 723                         } /*  End Method(_SB.INTF._SRS) */
 724                 } /* End Device(INTF)  */
 725
 726                 Device(INTG) {
 727                         Name(_HID, EISAID("PNP0C0F"))
 728                         Name(_UID, 7)
 729
 730                         Method(_STA, 0) {
 731                                 if (PING) {
 732                                         Return(0x0B) /* sata is invisible */
 733                                 } else {
 734                                         Return(0x09) /* sata is disabled */
 735                                 }
 736                         } /* End Method(_SB.INTG._STA)  */
 737
 738                         Method(_DIS ,0) {
 739                                 /* DBGO("\\_SB\\LNKG\\_DIS\n") */
 740                                 Store(0, PING)
 741                         } /* End Method(_SB.INTG._DIS)  */
 742
 743                         Method(_PRS ,0) {
 744                                 /* DBGO("\\_SB\\LNKG\\_PRS\n") */
 745                                 Return(IRQP)
 746                         } /* Method(_SB.INTG._CRS)  */
 747
 748                         Method(_CRS ,0) {
 749                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 750                                 CreateWordField(IRQB, 0x1, IRQN)
 751                                 ShiftLeft(1, PING, IRQN)
 752                                 Return(IRQB)
 753                         } /* Method(_SB.INTG._CRS)  */
 754
 755                         Method(_SRS, 1) {
 756                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 757                                 CreateWordField(ARG0, 1, IRQM)
 758
 759                                 /* Use lowest available IRQ */
 760                                 FindSetRightBit(IRQM, Local0)
 761                                 if (Local0) {
 762                                         Decrement(Local0)
 763                                 }
 764                                 Store(Local0, PING)
 765                         } /* End Method(_SB.INTG._SRS)  */
 766                 } /* End Device(INTG)  */
 767
 768                 Device(INTH) {
 769                         Name(_HID, EISAID("PNP0C0F"))
 770                         Name(_UID, 8)
 771
 772                         Method(_STA, 0) {
 773                                 if (PINH) {
 774                                         Return(0x0B) /* sata is invisible */
 775                                 } else {
 776                                         Return(0x09) /* sata is disabled */
 777                                 }
 778                         } /* End Method(_SB.INTH._STA)  */
 779
 780                         Method(_DIS ,0) {
 781                                 /* DBGO("\\_SB\\LNKH\\_DIS\n") */
 782                                 Store(0, PINH)
 783                         } /* End Method(_SB.INTH._DIS)  */
 784
 785                         Method(_PRS ,0) {
 786                                 /* DBGO("\\_SB\\LNKH\\_PRS\n") */
 787                                 Return(IRQP)
 788                         } /* Method(_SB.INTH._CRS)  */
 789
 790                         Method(_CRS ,0) {
 791                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 792                                 CreateWordField(IRQB, 0x1, IRQN)
 793                                 ShiftLeft(1, PINH, IRQN)
 794                                 Return(IRQB)
 795                         } /* Method(_SB.INTH._CRS)  */
 796
 797                         Method(_SRS, 1) {
 798                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 799                                 CreateWordField(ARG0, 1, IRQM)
 800
 801                                 /* Use lowest available IRQ */
 802                                 FindSetRightBit(IRQM, Local0)
 803                                 if (Local0) {
 804                                         Decrement(Local0)
 805                                 }
 806                                 Store(Local0, PINH)
 807                         } /* End Method(_SB.INTH._SRS)  */
 808                 } /* End Device(INTH)   */
 809
 810         }   /* End Scope(_SB)  */
 811
 812
 813         /* Supported sleep states: */
 814         Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )        /* (S0) - working state */
 815
 816         If (LAnd(SSFG, 0x01)) {
 817                 Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )        /* (S1) - sleeping w/CPU context */
 818         }
 819         If (LAnd(SSFG, 0x02)) {
 820                 Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )        /* (S2) - "light" Suspend to RAM */
 821         }
 822         If (LAnd(SSFG, 0x04)) {
 823                 Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )        /* (S3) - Suspend to RAM */
 824         }
 825         If (LAnd(SSFG, 0x08)) {
 826                 Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )        /* (S4) - Suspend to Disk */
 827         }
 828
 829         Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )        /* (S5) - Soft Off */
 830
 831         Name(\_SB.CSPS ,0)                              /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
 832         Name(CSMS, 0)                   /* Current System State */
 833
 834         /* Wake status package */
 835         Name(WKST,Package(){Zero, Zero})
 836
 837         /*
 838         * \_PTS - Prepare to Sleep method
 839         *
 840         *       Entry:
 841         *               Arg0=The value of the sleeping state S1=1, S2=2, etc
 842         *
 843         * Exit:
 844         *               -none-
 845         *
 846         * The _PTS control method is executed at the beginning of the sleep process
 847         * for S1-S5. The sleeping value is passed to the _PTS control method.   This
 848         * control method may be executed a relatively long time before entering the
 849         * sleep state and the OS may abort      the operation without notification to
 850         * the ACPI driver.  This method cannot modify the configuration or power
 851         * state of any device in the system.
 852         */
 853         Method(\_PTS, 1) {
 854                 /* DBGO("\\_PTS\n") */
 855                 /* DBGO("From S0 to S") */
 856                 /* DBGO(Arg0) */
 857                 /* DBGO("\n") */
 858
 859                 /* Don't allow PCIRST# to reset USB */
 860                 if (LEqual(Arg0,3)){
 861                         Store(0,URRE)
 862                 }
 863
 864                 /* Clear sleep SMI status flag and enable sleep SMI trap. */
 865                 /*Store(One, CSSM)
 866                 Store(One, SSEN)*/
 867
 868                 /* On older chips, clear PciExpWakeDisEn */
 869                 /*if (LLessEqual(\_SB.SBRI, 0x13)) {
 870                 *       Store(0,\_SB.PWDE)
 871                 *}
 872                 */
 873
 874                 /* Clear wake status structure. */
 875                 Store(0, Index(WKST,0))
 876                 Store(0, Index(WKST,1))
 877                 \_SB.PCI0.SIOS (Arg0)
 878         } /* End Method(\_PTS) */
 879
 880         /*
 881         *  The following method results in a "not a valid reserved NameSeg"
 882         *  warning so I have commented it out for the duration.  It isn't
 883         *  used, so it could be removed.
 884         *
 885         *
 886         *       \_GTS OEM Going To Sleep method
 887         *
 888         *       Entry:
 889         *               Arg0=The value of the sleeping state S1=1, S2=2
 890         *
 891         *       Exit:
 892         *               -none-
 893         *
 894         *  Method(\_GTS, 1) {
 895         *  DBGO("\\_GTS\n")
 896         *  DBGO("From S0 to S")
 897         *  DBGO(Arg0)
 898         *  DBGO("\n")
 899         *  }
 900         */
 901
 902         /*
 903         *       \_BFS OEM Back From Sleep method
 904         *
 905         *       Entry:
 906         *               Arg0=The value of the sleeping state S1=1, S2=2
 907         *
 908         *       Exit:
 909         *               -none-
 910         */
 911         Method(\_BFS, 1) {
 912                 /* DBGO("\\_BFS\n") */
 913                 /* DBGO("From S") */
 914                 /* DBGO(Arg0) */
 915                 /* DBGO(" to S0\n") */
 916         }
 917
 918         /*
 919         *  \_WAK System Wake method
 920         *
 921         *       Entry:
 922         *               Arg0=The value of the sleeping state S1=1, S2=2
 923         *
 924         *       Exit:
 925         *               Return package of 2 DWords
 926         *               Dword 1 - Status
 927         *                       0x00000000      wake succeeded
 928         *                       0x00000001      Wake was signaled but failed due to lack of power
 929         *                       0x00000002      Wake was signaled but failed due to thermal condition
 930         *               Dword 2 - Power Supply state
 931         *                       if non-zero the effective S-state the power supply entered
 932         */
 933         Method(\_WAK, 1) {
 934                 /* DBGO("\\_WAK\n") */
 935                 /* DBGO("From S") */
 936                 /* DBGO(Arg0) */
 937                 /* DBGO(" to S0\n") */
 938
 939                 /* Re-enable HPET */
 940                 Store(1,HPDE)
 941
 942                 /* Restore PCIRST# so it resets USB */
 943                 if (LEqual(Arg0,3)){
 944                         Store(1,URRE)
 945                 }
 946
 947                 /* Arbitrarily clear PciExpWakeStatus */
 948                 Store(PWST, PWST)
 949
 950                 /* if(DeRefOf(Index(WKST,0))) {
 951                 *       Store(0, Index(WKST,1))
 952                 * } else {
 953                 *       Store(Arg0, Index(WKST,1))
 954                 * }
 955                 */
 956                 \_SB.PCI0.SIOW (Arg0)
 957                 Return(WKST)
 958         } /* End Method(\_WAK) */
 959
 960         Scope(\_GPE) {  /* Start Scope GPE */
 961                 /*  General event 0  */
 962                 /* Method(_L00) {
 963                 *       DBGO("\\_GPE\\_L00\n")
 964                 * }
 965                 */
 966
 967                 /*  General event 1  */
 968                 /* Method(_L01) {
 969                 *       DBGO("\\_GPE\\_L00\n")
 970                 * }
 971                 */
 972
 973                 /*  General event 2  */
 974                 /* Method(_L02) {
 975                 *       DBGO("\\_GPE\\_L00\n")
 976                 * }
 977                 */
 978
 979                 /*  General event 3  */
 980                 Method(_L03) {
 981                         /* DBGO("\\_GPE\\_L00\n") */
 982                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 983                 }
 984
 985                 /*  General event 4  */
 986                 /* Method(_L04) {
 987                 *       DBGO("\\_GPE\\_L00\n")
 988                 * }
 989                 */
 990
 991                 /*  General event 5  */
 992                 /* Method(_L05) {
 993                 *       DBGO("\\_GPE\\_L00\n")
 994                 * }
 995                 */
 996
 997                 /*  General event 6 - Used for GPM6, moved to USB.asl */
 998                 /* Method(_L06) {
 999                 *       DBGO("\\_GPE\\_L00\n")
1000                 * }
1001                 */
1002
1003                 /*  General event 7 - Used for GPM7, moved to USB.asl */
1004                 /* Method(_L07) {
1005                 *       DBGO("\\_GPE\\_L07\n")
1006                 * }
1007                 */
1008
1009                 /*  Legacy PM event  */
1010                 Method(_L08) {
1011                         /* DBGO("\\_GPE\\_L08\n") */
1012                 }
1013
1014                 /*  Temp warning (TWarn) event  */
1015                 Method(_L09) {
1016                         /* DBGO("\\_GPE\\_L09\n") */
1017                         Notify (\_TZ.TZ00, 0x80)
1018                 }
1019
1020                 /*  Reserved  */
1021                 /* Method(_L0A) {
1022                 *       DBGO("\\_GPE\\_L0A\n")
1023                 * }
1024                 */
1025
1026                 /*  USB controller PME#  */
1027                 Method(_L0B) {
1028                         /* DBGO("\\_GPE\\_L0B\n") */
1029                         Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
1030                         Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
1031                         Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
1032                         Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
1033                         Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
1034                         Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
1035                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1036                 }
1037
1038                 /*  AC97 controller PME#  */
1039                 /* Method(_L0C) {
1040                 *       DBGO("\\_GPE\\_L0C\n")
1041                 * }
1042                 */
1043
1044                 /*  OtherTherm PME#  */
1045                 /* Method(_L0D) {
1046                 *       DBGO("\\_GPE\\_L0D\n")
1047                 * }
1048                 */
1049
1050                 /*  GPM9 SCI event - Moved to USB.asl */
1051                 /* Method(_L0E) {
1052                 *       DBGO("\\_GPE\\_L0E\n")
1053                 * }
1054                 */
1055
1056                 /*  PCIe HotPlug event  */
1057                 /* Method(_L0F) {
1058                 *       DBGO("\\_GPE\\_L0F\n")
1059                 * }
1060                 */
1061
1062                 /*  ExtEvent0 SCI event  */
1063                 Method(_L10) {
1064                         /* DBGO("\\_GPE\\_L10\n") */
1065                 }
1066
1067
1068                 /*  ExtEvent1 SCI event  */
1069                 Method(_L11) {
1070                         /* DBGO("\\_GPE\\_L11\n") */
1071                 }
1072
1073                 /*  PCIe PME# event  */
1074                 /* Method(_L12) {
1075                 *       DBGO("\\_GPE\\_L12\n")
1076                 * }
1077                 */
1078
1079                 /*  GPM0 SCI event - Moved to USB.asl */
1080                 /* Method(_L13) {
1081                 *       DBGO("\\_GPE\\_L13\n")
1082                 * }
1083                 */
1084
1085                 /*  GPM1 SCI event - Moved to USB.asl */
1086                 /* Method(_L14) {
1087                 *       DBGO("\\_GPE\\_L14\n")
1088                 * }
1089                 */
1090
1091                 /*  GPM2 SCI event - Moved to USB.asl */
1092                 /* Method(_L15) {
1093                 *       DBGO("\\_GPE\\_L15\n")
1094                 * }
1095                 */
1096
1097                 /*  GPM3 SCI event - Moved to USB.asl */
1098                 /* Method(_L16) {
1099                 *       DBGO("\\_GPE\\_L16\n")
1100                 * }
1101                 */
1102
1103                 /*  GPM8 SCI event - Moved to USB.asl */
1104                 /* Method(_L17) {
1105                 *       DBGO("\\_GPE\\_L17\n")
1106                 * }
1107                 */
1108
1109                 /*  GPIO0 or GEvent8 event  */
1110                 Method(_L18) {
1111                         /* DBGO("\\_GPE\\_L18\n") */
1112                         Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
1113                         Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
1114                         Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
1115                         Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
1116                         Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
1117                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1118                 }
1119
1120                 /*  GPM4 SCI event - Moved to USB.asl */
1121                 /* Method(_L19) {
1122                 *       DBGO("\\_GPE\\_L19\n")
1123                 * }
1124                 */
1125
1126                 /*  GPM5 SCI event - Moved to USB.asl */
1127                 /* Method(_L1A) {
1128                 *       DBGO("\\_GPE\\_L1A\n")
1129                 * }
1130                 */
1131
1132                 /*  Azalia SCI event  */
1133                 Method(_L1B) {
1134                         /* DBGO("\\_GPE\\_L1B\n") */
1135                         Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
1136                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1137                 }
1138
1139                 /*  GPM6 SCI event - Reassigned to _L06 */
1140                 /* Method(_L1C) {
1141                 *       DBGO("\\_GPE\\_L1C\n")
1142                 * }
1143                 */
1144
1145                 /*  GPM7 SCI event - Reassigned to _L07 */
1146                 /* Method(_L1D) {
1147                 *       DBGO("\\_GPE\\_L1D\n")
1148                 * }
1149                 */
1150
1151                 /*  GPIO2 or GPIO66 SCI event  */
1152                 /* Method(_L1E) {
1153                 *       DBGO("\\_GPE\\_L1E\n")
1154                 * }
1155                 */
1156
1157                 /*  SATA SCI event - Moved to sata.asl */
1158                 /* Method(_L1F) {
1159                 *        DBGO("\\_GPE\\_L1F\n")
1160                 * }
1161                 */
1162
1163         }       /* End Scope GPE */
1164
1165         Include ("usb.asl")
1166
1167         /* South Bridge */
1168         Scope(\_SB) { /* Start \_SB scope */
1169                 Include ("globutil.asl") /* global utility methods expected within the \_SB scope */
1170
1171                 /*  _SB.PCI0 */
1172                 /* Note: Only need HID on Primary Bus */
1173                 Device(PCI0) {
1174                         External (TOM1)
1175                         Name(_HID, EISAID("PNP0A03"))
1176                         Name(_ADR, 0x00180000)  /* Dev# = BSP Dev#, Func# = 0 */
1177                         Method(_BBN, 0) { /* Bus number = 0 */
1178                                 Return(0)
1179                         }
1180                         Method(_STA, 0) {
1181                                 /* DBGO("\\_SB\\PCI0\\_STA\n") */
1182                                 Return(0x0B)     /* Status is visible */
1183                         }
1184
1185                         Method(_PRT,0) {
1186                                 If(PMOD){ Return(APR0) }   /* APIC mode */
1187                                 Return (PR0)                  /* PIC Mode */
1188                         } /* end _PRT */
1189
1190                         /* Describe the Northbridge devices */
1191                         Device(AMRT) {
1192                                 Name(_ADR, 0x00000000)
1193                         } /* end AMRT */
1194
1195                         /* The internal GFX bridge */
1196                         Device(AGPB) {
1197                                 Name(_ADR, 0x00010000)
1198                                 Name(_PRW, Package() {0x18, 4})
1199                                 Method(_PRT,0) {
1200                                         Return (APR1)
1201                                 }
1202                         }  /* end AGPB */
1203
1204                         /* The external GFX bridge */
1205                         Device(PBR2) {
1206                                 Name(_ADR, 0x00020000)
1207                                 Name(_PRW, Package() {0x18, 4})
1208                                 Method(_PRT,0) {
1209                                         If(PMOD){ Return(APS2) }   /* APIC mode */
1210                                         Return (PS2)                  /* PIC Mode */
1211                                 } /* end _PRT */
1212                         } /* end PBR2 */
1213
1214                         /* Dev3 is also an external GFX bridge, not used in Herring */
1215
1216                         Device(PBR4) {
1217                                 Name(_ADR, 0x00040000)
1218                                 Name(_PRW, Package() {0x18, 4})
1219                                 Method(_PRT,0) {
1220                                         If(PMOD){ Return(APS4) }   /* APIC mode */
1221                                         Return (PS4)                  /* PIC Mode */
1222                                 } /* end _PRT */
1223                         } /* end PBR4 */
1224
1225                         Device(PBR5) {
1226                                 Name(_ADR, 0x00050000)
1227                                 Name(_PRW, Package() {0x18, 4})
1228                                 Method(_PRT,0) {
1229                                         If(PMOD){ Return(APS5) }   /* APIC mode */
1230                                         Return (PS5)                  /* PIC Mode */
1231                                 } /* end _PRT */
1232                         } /* end PBR5 */
1233
1234                         Device(PBR6) {
1235                                 Name(_ADR, 0x00060000)
1236                                 Name(_PRW, Package() {0x18, 4})
1237                                 Method(_PRT,0) {
1238                                         If(PMOD){ Return(APS6) }   /* APIC mode */
1239                                         Return (PS6)                  /* PIC Mode */
1240                                 } /* end _PRT */
1241                         } /* end PBR6 */
1242
1243                         /* The onboard EtherNet chip */
1244                         Device(PBR7) {
1245                                 Name(_ADR, 0x00070000)
1246                                 Name(_PRW, Package() {0x18, 4})
1247                                 Method(_PRT,0) {
1248                                         If(PMOD){ Return(APS7) }   /* APIC mode */
1249                                         Return (PS7)                  /* PIC Mode */
1250                                 } /* end _PRT */
1251                         } /* end PBR7 */
1252
1253
1254                         /* PCI slot 1, 2, 3 */
1255                         Device(PIBR) {
1256                                 Name(_ADR, 0x00140004)
1257                                 Name(_PRW, Package() {0x18, 4})
1258
1259                                 Method(_PRT, 0) {
1260                                         Return (PCIB)
1261                                 }
1262                         }
1263
1264                         /* Describe the Southbridge devices */
1265                         Device(STCR) {
1266                                 Name(_ADR, 0x00120000)
1267                                 Include ("sata.asl")
1268                         } /* end STCR */
1269
1270                         Device(UOH1) {
1271                                 Name(_ADR, 0x00130000)
1272                                 Name(_PRW, Package() {0x0B, 3})
1273                         } /* end UOH1 */
1274
1275                         Device(UOH2) {
1276                                 Name(_ADR, 0x00130001)
1277                                 Name(_PRW, Package() {0x0B, 3})
1278                         } /* end UOH2 */
1279
1280                         Device(UOH3) {
1281                                 Name(_ADR, 0x00130002)
1282                                 Name(_PRW, Package() {0x0B, 3})
1283                         } /* end UOH3 */
1284
1285                         Device(UOH4) {
1286                                 Name(_ADR, 0x00130003)
1287                                 Name(_PRW, Package() {0x0B, 3})
1288                         } /* end UOH4 */
1289
1290                         Device(UOH5) {
1291                                 Name(_ADR, 0x00130004)
1292                                 Name(_PRW, Package() {0x0B, 3})
1293                         } /* end UOH5 */
1294
1295                         Device(UEH1) {
1296                                 Name(_ADR, 0x00130005)
1297                                 Name(_PRW, Package() {0x0B, 3})
1298                         } /* end UEH1 */
1299
1300                         Device(SBUS) {
1301                                 Name(_ADR, 0x00140000)
1302                         } /* end SBUS */
1303
1304                         /* Primary (and only) IDE channel */
1305                         Device(IDEC) {
1306                                 Name(_ADR, 0x00140001)
1307                                 Include ("ide.asl")
1308                         } /* end IDEC */
1309
1310                         Device(AZHD) {
1311                                 Name(_ADR, 0x00140002)
1312                                 OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
1313                                         Field(AZPD, AnyAcc, NoLock, Preserve) {
1314                                         offset (0x42),
1315                                         NSDI, 1,
1316                                         NSDO, 1,
1317                                         NSEN, 1,
1318                                         offset (0x44),
1319                                         IPCR, 4,
1320                                         offset (0x54),
1321                                         PWST, 2,
1322                                         , 6,
1323                                         PMEB, 1,
1324                                         , 6,
1325                                         PMST, 1,
1326                                         offset (0x62),
1327                                         MMCR, 1,
1328                                         offset (0x64),
1329                                         MMLA, 32,
1330                                         offset (0x68),
1331                                         MMHA, 32,
1332                                         offset (0x6C),
1333                                         MMDT, 16,
1334                                 }
1335
1336                                 Method(_INI) {
1337                                         If(LEqual(OSTP,3)){   /* If we are running Linux */
1338                                                 Store(zero, NSEN)
1339                                                 Store(one, NSDO)
1340                                                 Store(one, NSDI)
1341                                         }
1342                                 }
1343                         } /* end AZHD */
1344
1345                         Device(LIBR) {
1346                                 Name(_ADR, 0x00140003)
1347                                 /* Method(_INI) {
1348                                 *       DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
1349                                 } */ /* End Method(_SB.SBRDG._INI) */
1350
1351                                 /* Real Time Clock Device */
1352                                 Device(RTC0) {
1353                                         Name(_HID, EISAID("PNP0B01"))   /* AT Real Time Clock */
1354                                         Name(_CRS, ResourceTemplate() {
1355                                                 IRQNoFlags(){8}
1356                                                 IO(Decode16,0x0070, 0x0070, 0, 2)
1357                                                 /* IO(Decode16,0x0070, 0x0070, 0, 4) */
1358                                         })
1359                                 } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
1360
1361                                 Device(TMR) {   /* Timer */
1362                                         Name(_HID,EISAID("PNP0100"))    /* System Timer */
1363                                         Name(_CRS, ResourceTemplate() {
1364                                                 IRQNoFlags(){0}
1365                                                 IO(Decode16, 0x0040, 0x0040, 0, 4)
1366                                                 /* IO(Decode16, 0x0048, 0x0048, 0, 4) */
1367                                         })
1368                                 } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
1369
1370                                 Device(SPKR) {  /* Speaker */
1371                                         Name(_HID,EISAID("PNP0800"))    /* AT style speaker */
1372                                         Name(_CRS, ResourceTemplate() {
1373                                                 IO(Decode16, 0x0061, 0x0061, 0, 1)
1374                                         })
1375                                 } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
1376
1377                                 Device(PIC) {
1378                                         Name(_HID,EISAID("PNP0000"))    /* AT Interrupt Controller */
1379                                         Name(_CRS, ResourceTemplate() {
1380                                                 IRQNoFlags(){2}
1381                                                 IO(Decode16,0x0020, 0x0020, 0, 2)
1382                                                 IO(Decode16,0x00A0, 0x00A0, 0, 2)
1383                                                 /* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */
1384                                                 /* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */
1385                                         })
1386                                 } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
1387
1388                                 Device(MAD) { /* 8257 DMA */
1389                                         Name(_HID,EISAID("PNP0200"))    /* Hardware Device ID */
1390                                         Name(_CRS, ResourceTemplate() {
1391                                                 DMA(Compatibility,BusMaster,Transfer8){4}
1392                                                 IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
1393                                                 IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
1394                                                 IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
1395                                                 IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
1396                                                 IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
1397                                                 IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
1398                                         }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
1399                                 } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
1400
1401                                 Device(COPR) {
1402                                         Name(_HID,EISAID("PNP0C04"))    /* Math Coprocessor */
1403                                         Name(_CRS, ResourceTemplate() {
1404                                                 IO(Decode16, 0x00F0, 0x00F0, 0, 0x10)
1405                                                 IRQNoFlags(){13}
1406                                         })
1407                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1408
1409                                 Device(HPTM) {
1410                                         Name(_HID,EISAID("PNP0103"))
1411                                         Name(CRS,ResourceTemplate()     {
1412                                                 Memory32Fixed(ReadOnly,0xFED00000, 0x00000400, HPT)     /* 1kb reserved space */
1413                                         })
1414                                         Method(_STA, 0) {
1415                                                 Return(0x0F) /* sata is visible */
1416                                         }
1417                                         Method(_CRS, 0) {
1418                                                 CreateDwordField(CRS, ^HPT._BAS, HPBA)
1419                                                 Store(HPBA, HPBA)
1420                                                 Return(CRS)
1421                                         }
1422                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1423                         } /* end LIBR */
1424
1425                         Device(HPBR) {
1426                                 Name(_ADR, 0x00140004)
1427                         } /* end HostPciBr */
1428
1429                         Device(ACAD) {
1430                                 Name(_ADR, 0x00140005)
1431                         } /* end Ac97audio */
1432
1433                         Device(ACMD) {
1434                                 Name(_ADR, 0x00140006)
1435                         } /* end Ac97modem */
1436
1437                         /* ITE IT8712F Support */
1438                         OperationRegion (IOID, SystemIO, 0x2E, 0x02)    /* sometimes it is 0x4E */
1439                                 Field (IOID, ByteAcc, NoLock, Preserve)
1440                                 {
1441                                         SIOI,   8,    SIOD,   8         /* 0x2E and 0x2F */
1442                                 }
1443
1444                         IndexField (SIOI, SIOD, ByteAcc, NoLock, Preserve)
1445                         {
1446                                         Offset (0x07),
1447                                 LDN,    8,      /* Logical Device Number */
1448                                         Offset (0x20),
1449                                 CID1,   8,      /* Chip ID Byte 1, 0x87 */
1450                                 CID2,   8,      /* Chip ID Byte 2, 0x12 */
1451                                         Offset (0x30),
1452                                 ACTR,   8,      /* Function activate */
1453                                         Offset (0xF0),
1454                                 APC0,   8,      /* APC/PME Event Enable Register */
1455                                 APC1,   8,      /* APC/PME Status Register */
1456                                 APC2,   8,      /* APC/PME Control Register 1 */
1457                                 APC3,   8,      /* Environment Controller Special Configuration Register */
1458                                 APC4,   8       /* APC/PME Control Register 2 */
1459                         }
1460
1461                         /* Enter the IT8712F MB PnP Mode */
1462                         Method (EPNP)
1463                         {
1464                                 Store(0x87, SIOI)
1465                                 Store(0x01, SIOI)
1466                                 Store(0x55, SIOI)
1467                                 Store(0x55, SIOI) /* IT8712F magic number */
1468                         }
1469                         /* Exit the IT8712F MB PnP Mode */
1470                         Method (XPNP)
1471                         {
1472                                 Store (0x02, SIOI)
1473                                 Store (0x02, SIOD)
1474                         }
1475
1476                         /*
1477                          * Keyboard PME is routed to SB600 Gevent3. We can wake
1478                          * up the system by pressing the key.
1479                          */
1480                         Method (SIOS, 1)
1481                         {
1482                                 /* We only enable KBD PME for S5. */
1483                                 If (LLess (Arg0, 0x05))
1484                                 {
1485                                         EPNP()
1486                                         /* DBGO("IT8712F\n") */
1487
1488                                         Store (0x4, LDN)
1489                                         Store (One, ACTR)  /* Enable EC */
1490                                         /*
1491                                         Store (0x4, LDN)
1492                                         Store (0x04, APC4)
1493                                         */  /* falling edge. which mode? Not sure. */
1494
1495                                         Store (0x4, LDN)
1496                                         Store (0x08, APC1) /* clear PME status, Use 0x18 for mouse & KBD */
1497                                         Store (0x4, LDN)
1498                                         Store (0x08, APC0) /* enable PME, Use 0x18 for mouse & KBD */
1499
1500                                         XPNP()
1501                                 }
1502                         }
1503                         Method (SIOW, 1)
1504                         {
1505                                 EPNP()
1506                                 Store (0x4, LDN)
1507                                 Store (Zero, APC0) /* disable keyboard PME */
1508                                 Store (0x4, LDN)
1509                                 Store (0xFF, APC1) /* clear keyboard PME status */
1510                                 XPNP()
1511                         }
1512
1513                         Name(CRES, ResourceTemplate() {
1514                                 IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
1515
1516                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1517                                         0x0000,                 /* address granularity */
1518                                         0x0000,                 /* range minimum */
1519                                         0x0CF7,                 /* range maximum */
1520                                         0x0000,                 /* translation */
1521                                         0x0CF8                  /* Resource source index */
1522                                 )
1523
1524                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1525                                         0x0000,                 /* address granularity */
1526                                         0x0D00,                 /* range minimum */
1527                                         0xFFFF,                 /* range maximum */
1528                                         0x0000,                 /* translation */
1529                                         0xF300                  /* length */
1530                                 )
1531
1532                                 Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)
1533                                 Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   /* VGA memory space */
1534                                 Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1)   /* Assume C0000-E0000 empty */
1535                                 Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS)   /* BIOS ROM area */
1536
1537                                 /* DRAM Memory from 1MB to TopMem */
1538                                 Memory32Fixed(READWRITE, 0x00100000, 0, DMLO)   /* 1MB to TopMem */
1539
1540                                 /* BIOS space just below 4GB */
1541                                 DWORDMemory(
1542                                         ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1543                                         0x00,                   /* Granularity */
1544                                         0x00000000,             /* Min */
1545                                         0x00000000,             /* Max */
1546                                         0x00000000,             /* Translation */
1547                                         0x00000000,             /* Max-Min, RLEN */
1548                                         ,,
1549                                         PCBM
1550                                 )
1551
1552                                 /* DRAM memory from 4GB to TopMem2 */
1553                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1554                                         0xFFFFFFFF,             /* Granularity */
1555                                         0x00000000,             /*  Min */
1556                                         0x00000000,             /* Max */
1557                                         0x00000000,             /* Translation */
1558                                         0x00000000,             /* Max-Min, RLEN */
1559                                         ,,
1560                                         DMHI
1561                                 )
1562
1563                                 /* BIOS space just below 16EB */
1564                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1565                                         0xFFFFFFFF,             /* Granularity */
1566                                         0x00000000,             /* Min */
1567                                         0x00000000,             /*  Max */
1568                                         0x00000000,             /* Translation */
1569                                         0x00000000,             /* Max-Min, RLEN */
1570                                         ,,
1571                                         PEBM
1572                                 )
1573
1574                         }) /* End Name(_SB.PCI0.CRES) */
1575
1576                         Method(_CRS, 0) {
1577                                 /* DBGO("\\_SB\\PCI0\\_CRS\n") */
1578
1579                                 CreateDWordField(CRES, ^EMM1._BAS, EM1B)
1580                                 CreateDWordField(CRES, ^EMM1._LEN, EM1L)
1581                                 CreateDWordField(CRES, ^DMLO._BAS, DMLB)
1582                                 CreateDWordField(CRES, ^DMLO._LEN, DMLL)
1583                                 CreateDWordField(CRES, ^PCBM._MIN, PBMB)
1584                                 CreateDWordField(CRES, ^PCBM._LEN, PBML)
1585
1586                                 CreateQWordField(CRES, ^DMHI._MIN, DMHB)
1587                                 CreateQWordField(CRES, ^DMHI._LEN, DMHL)
1588                                 CreateQWordField(CRES, ^PEBM._MIN, EBMB)
1589                                 CreateQWordField(CRES, ^PEBM._LEN, EBML)
1590
1591                                 If(LGreater(LOMH, 0xC0000)){
1592                                         Store(0xC0000, EM1B)    /* Hole above C0000 and below E0000 */
1593                                         Subtract(LOMH, 0xC0000, EM1L)   /* subtract start, assumes allocation from C0000 going up */
1594                                 }
1595
1596                                 /* Set size of memory from 1MB to TopMem */
1597                                 Subtract(TOM1, 0x100000, DMLL)
1598
1599                                 /*
1600                                 * If(LNotEqual(TOM2, 0x00000000)){
1601                                 *       Store(0x100000000,DMHB)                 DRAM from 4GB to TopMem2
1602                                 *       Subtract(TOM2, 0x100000000, DMHL)
1603                                 * }
1604                                 */
1605
1606                                 /* If there is no memory above 4GB, put the BIOS just below 4GB */
1607                                 If(LEqual(TOM2, 0x00000000)){
1608                                         Store(PBAD,PBMB)                        /* Reserve the "BIOS" space */
1609                                         Store(PBLN,PBML)
1610                                 }
1611                                 Else {  /* Otherwise, put the BIOS just below 16EB */
1612                                         ShiftLeft(PBAD,16,EBMB)         /* Reserve the "BIOS" space */
1613                                         Store(PBLN,EBML)
1614                                 }
1615
1616                                 Return(CRES) /* note to change the Name buffer */
1617                         }  /* end of Method(_SB.PCI0._CRS) */
1618
1619                         /*
1620                         *
1621                         *               FIRST METHOD CALLED UPON BOOT
1622                         *
1623                         *  1. If debugging, print current OS and ACPI interpreter.
1624                         *  2. Get PCI Interrupt routing from ACPI VSM, this
1625                         *     value is based on user choice in BIOS setup.
1626                         */
1627                         Method(_INI, 0) {
1628                                 /* DBGO("\\_SB\\_INI\n") */
1629                                 /* DBGO("   DSDT.ASL code from ") */
1630                                 /* DBGO(__DATE__) */
1631                                 /* DBGO(" ") */
1632                                 /* DBGO(__TIME__) */
1633                                 /* DBGO("\n   Sleep states supported: ") */
1634                                 /* DBGO("\n") */
1635                                 /* DBGO("   \\_OS=") */
1636                                 /* DBGO(\_OS) */
1637                                 /* DBGO("\n   \\_REV=") */
1638                                 /* DBGO(\_REV) */
1639                                 /* DBGO("\n") */
1640
1641                                 /* Determine the OS we're running on */
1642                                 CkOT()
1643
1644                                 /* On older chips, clear PciExpWakeDisEn */
1645                                 /*if (LLessEqual(\SBRI, 0x13)) {
1646                                 *       Store(0,\PWDE)
1647                                 * }
1648                                 */
1649                         } /* End Method(_SB._INI) */
1650                 } /* End Device(PCI0)  */
1651
1652                 Device(PWRB) {  /* Start Power button device */
1653                         Name(_HID, EISAID("PNP0C0C"))
1654                         Name(_UID, 0xAA)
1655                         Name(_PRW, Package () {3, 0x04})        /* wake from S1-S4 */
1656                         Name(_STA, 0x0B) /* sata is invisible */
1657                 }
1658         } /* End \_SB scope */
1659
1660         Scope(\_SI) {
1661                 Method(_SST, 1) {
1662                         /* DBGO("\\_SI\\_SST\n") */
1663                         /* DBGO("   New Indicator state: ") */
1664                         /* DBGO(Arg0) */
1665                         /* DBGO("\n") */
1666                 }
1667         } /* End Scope SI */
1668
1669         Mutex (SBX0, 0x00)
1670         OperationRegion (SMB0, SystemIO, 0xB00, 0x0C)
1671                 Field (SMB0, ByteAcc, NoLock, Preserve) {
1672                         HSTS,   8, /* SMBUS status */
1673                         SSTS,   8,  /* SMBUS slave status */
1674                         HCNT,   8,  /* SMBUS control */
1675                         HCMD,   8,  /* SMBUS host cmd */
1676                         HADD,   8,  /* SMBUS address */
1677                         DAT0,   8,  /* SMBUS data0 */
1678                         DAT1,   8,  /* SMBUS data1 */
1679                         BLKD,   8,  /* SMBUS block data */
1680                         SCNT,   8,  /* SMBUS slave control */
1681                         SCMD,   8,  /* SMBUS shaow cmd */
1682                         SEVT,   8,  /* SMBUS slave event */
1683                         SDAT,   8  /* SMBUS slave data */
1684         }
1685
1686         Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */
1687                 Store (0x1E, HSTS)
1688                 Store (0xFA, Local0)
1689                 While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) {
1690                         Stall (0x64)
1691                         Decrement (Local0)
1692                 }
1693
1694                 Return (Local0)
1695         }
1696
1697         Method (SWTC, 1, NotSerialized) {
1698                 Store (Arg0, Local0)
1699                 Store (0x07, Local2)
1700                 Store (One, Local1)
1701                 While (LEqual (Local1, One)) {
1702                         Store (And (HSTS, 0x1E), Local3)
1703                         If (LNotEqual (Local3, Zero)) { /* read sucess */
1704                                 If (LEqual (Local3, 0x02)) {
1705                                         Store (Zero, Local2)
1706                                 }
1707
1708                                 Store (Zero, Local1)
1709                         }
1710                         Else {
1711                                 If (LLess (Local0, 0x0A)) { /* read failure */
1712                                         Store (0x10, Local2)
1713                                         Store (Zero, Local1)
1714                                 }
1715                                 Else {
1716                                         Sleep (0x0A) /* 10 ms, try again */
1717                                         Subtract (Local0, 0x0A, Local0)
1718                                 }
1719                         }
1720                 }
1721
1722                 Return (Local2)
1723         }
1724
1725         Method (SMBR, 3, NotSerialized) {
1726                 Store (0x07, Local0)
1727                 If (LEqual (Acquire (SBX0, 0xFFFF), Zero)) {
1728                         Store (WCLR (), Local0) /* clear SMBUS status register before read data */
1729                         If (LEqual (Local0, Zero)) {
1730                                 Release (SBX0)
1731                                 Return (0x0)
1732                         }
1733
1734                         Store (0x1F, HSTS)
1735                         Store (Or (ShiftLeft (Arg1, One), One), HADD)
1736                         Store (Arg2, HCMD)
1737                         If (LEqual (Arg0, 0x07)) {
1738                                 Store (0x48, HCNT) /* read byte */
1739                         }
1740
1741                         Store (SWTC (0x03E8), Local1) /* 1000 ms */
1742                         If (LEqual (Local1, Zero)) {
1743                                 If (LEqual (Arg0, 0x07)) {
1744                                         Store (DAT0, Local0)
1745                                 }
1746                         }
1747                         Else {
1748                                 Store (Local1, Local0)
1749                         }
1750
1751                         Release (SBX0)
1752                 }
1753
1754                 /* DBGO("the value of SMBusData0 register ") */
1755                 /* DBGO(Arg2) */
1756                 /* DBGO(" is ") */
1757                 /* DBGO(Local0) */
1758                 /* DBGO("\n") */
1759
1760                 Return (Local0)
1761         }
1762
1763         /* THERMAL */
1764         Scope(\_TZ) {
1765                 Name (KELV, 2732)
1766                 Name (THOT, 800)
1767                 Name (TCRT, 850)
1768
1769                 ThermalZone(TZ00) {
1770                         Method(_AC0,0) {        /* Active Cooling 0 (0=highest fan speed) */
1771                                 /* DBGO("\\_TZ\\TZ00\\_AC0\n") */
1772                                 Return(Add(0, 2730))
1773                         }
1774                         Method(_AL0,0) {        /* Returns package of cooling device to turn on */
1775                                 /* DBGO("\\_TZ\\TZ00\\_AL0\n") */
1776                                 Return(Package() {\_TZ.TZ00.FAN0})
1777                         }
1778                         Device (FAN0) {
1779                                 Name(_HID, EISAID("PNP0C0B"))
1780                                 Name(_PR0, Package() {PFN0})
1781                         }
1782
1783                         PowerResource(PFN0,0,0) {
1784                                 Method(_STA) {
1785                                         Store(0xF,Local0)
1786                                         Return(Local0)
1787                                 }
1788                                 Method(_ON) {
1789                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _ON\n") */
1790                                 }
1791                                 Method(_OFF) {
1792                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _OFF\n") */
1793                                 }
1794                         }
1795
1796                         Method(_HOT,0) {        /* return hot temp in tenths degree Kelvin */
1797                                 /* DBGO("\\_TZ\\TZ00\\_HOT\n") */
1798                                 Return (Add (THOT, KELV))
1799                         }
1800                         Method(_CRT,0) {        /* return critical temp in tenths degree Kelvin */
1801                                 /* DBGO("\\_TZ\\TZ00\\_CRT\n") */
1802                                 Return (Add (TCRT, KELV))
1803                         }
1804                         Method(_TMP,0) {        /* return current temp of this zone */
1805                                 Store (SMBR (0x07, 0x4C,, 0x00), Local0)
1806                                 If (LGreater (Local0, 0x10)) {
1807                                         Store (Local0, Local1)
1808                                 }
1809                                 Else {
1810                                         Add (Local0, THOT, Local0)
1811                                         Return (Add (400, KELV))
1812                                 }
1813
1814                                 Store (SMBR (0x07, 0x4C, 0x01), Local0)
1815                                 /* only the two MSBs in the external temperature low byte are used, resolution 0.25. We ignore it */
1816                                 /* Store (SMBR (0x07, 0x4C, 0x10), Local2) */
1817                                 If (LGreater (Local0, 0x10)) {
1818                                         If (LGreater (Local0, Local1)) {
1819                                                 Store (Local0, Local1)
1820                                         }
1821
1822                                         Multiply (Local1, 10, Local1)
1823                                         Return (Add (Local1, KELV))
1824                                 }
1825                                 Else {
1826                                         Add (Local0, THOT, Local0)
1827                                         Return (Add (400 , KELV))
1828                                 }
1829                         } /* end of _TMP */
1830                 } /* end of TZ00 */
1831         }
1832 }
1833 /* End of ASL file */