1 #include <arch/pirq_routing.h>
2 #include <device/pci.h>
4 #define IRQ_ROUTER_BUS 1
5 #define IRQ_ROUTER_DEVFN PCI_DEVFN(4,3)
6 #define IRQ_ROUTER_VENDOR 0x1022
7 #define IRQ_ROUTER_DEVICE 0x746b
9 #define AVAILABLE_IRQS 0xdef8
10 #define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
11 { bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
12 {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
14 /* Each IRQ_SLOT entry consists of:
15 * bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
18 const struct irq_routing_table intel_irq_routing_table = {
19 PIRQ_SIGNATURE, /* u32 signature */
20 PIRQ_VERSION, /* u16 version */
21 32+16*IRQ_SLOT_COUNT, /* there can be total IRQ_SLOT_COUNT table entries */
22 IRQ_ROUTER_BUS, /* Where the interrupt router lies (bus) */
23 IRQ_ROUTER_DEVFN, /* Where the interrupt router lies (dev) */
24 0x00, /* IRQs devoted exclusively to PCI usage */
25 IRQ_ROUTER_VENDOR, /* Vendor */
26 IRQ_ROUTER_DEVICE, /* Device */
27 0x00, /* Crap (miniport) */
28 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
29 0x6a, /* u8 checksum , mod 256 checksum must give zero */
30 { /* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
31 IRQ_SLOT(0, 0x01,4,0, 1,2,3,4 ), /* 8111 PCI bridge */
32 IRQ_SLOT(0, 0x04,0,0, 4,0,0,0 ), /* 8111 USB */
33 IRQ_SLOT(1, 0x06,1,0, 2,3,4,1 ), /* ???? was: bus A*/
34 IRQ_SLOT(2, 0x07,1,0, 2,3,4,1 ), /* ???? was: bus 9*/
35 IRQ_SLOT(3, 0x0a,1,0, 2,3,4,1 ), /* IBM PCI-X <-> PCI-X */
36 IRQ_SLOT(4, 0x08,1,0, 2,3,4,1 ), /* IBM PCI-X <-> PCI-X */
37 IRQ_SLOT(0, 0x04,4,0, 1,0,0,0 ), /* ATI Rage */
38 IRQ_SLOT(0, 0x06,2,0, 3,4,0,0 ), /* ???? was: bus A */
39 IRQ_SLOT(0, 0x07,2,0, 3,4,0,0 ), /* ???? was: bus 9 */
40 IRQ_SLOT(0, 0x0a,2,0, 3,4,0,0 ), /* Intel 82546EB GBit */
41 IRQ_SLOT(0, 0x08,2,0, 3,4,0,0 ), /* Intel 82546EB GBit */
42 IRQ_SLOT(0, 0x0d,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
43 IRQ_SLOT(0, 0x0d,2,0, 2,0,0,0 ), /* Marvell MV88SX5080 SATA */
44 IRQ_SLOT(0, 0x0e,1,0, 1,2,3,4 ), /* Intel Memory Controller 031a */
45 IRQ_SLOT(0, 0x0f,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
46 IRQ_SLOT(0, 0x04,5,0, 2,0,0,0 ), /* Intel 8255 Ethernet */
47 IRQ_SLOT(5, 0x10,1,0, 1,2,3,4 ), /* ???? was: bus C */
48 IRQ_SLOT(0, 0x12,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
49 IRQ_SLOT(0, 0x12,2,0, 2,0,0,0 ), /* Marvell MV88SX5080 SATA */
50 IRQ_SLOT(0, 0x13,1,0, 1,2,3,4 ), /* Intel Memory Controller 031b */
51 IRQ_SLOT(0, 0x14,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
52 IRQ_SLOT(6, 0x15,1,0, 1,2,3,4 ), /* ???? was: bus 11 */
53 /* Let Linux know about bus 1 */
54 IRQ_SLOT(0, 1,4,3, 0,0,0,0 ),
57 unsigned long write_pirq_routing_table(unsigned long addr)
59 return copy_pirq_routing_table(addr);