Increase ROM_IMAGE_SIZE for the agami aruma to resolve overlapping
[coreboot.git] / src / mainboard / agami / aruma / get_bus_conf.c
1 #include <console/console.h>
2 #include <device/pci.h>
3 #include <device/pci_ids.h>
4 #include <string.h>
5 #include <stdint.h>
6 #include <stdlib.h>
7 #if CONFIG_LOGICAL_CPUS==1
8 #include <cpu/amd/dualcore.h>
9 #endif
10
11
12 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
13 //busnum is default
14 unsigned char bus_isa = 7;
15 unsigned char bus_8111_0 = 1;
16 unsigned char bus_8111_1 = 4;
17 unsigned char bus_8131[7][3];   // another 6 8131
18 unsigned apicid_8111;
19 unsigned apicid_8131[7][2];
20
21 unsigned sblk;
22 unsigned pci1234[] = {          //Here you only need to set value in pci1234 for HT-IO that could be installed or not
23         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
24         0x0000ff0,
25         0x0000f10,
26         0x0000f20,
27         0x0000f30,
28 //        0x0000ff0,
29 //        0x0000ff0,
30 //        0x0000ff0,
31 //        0x0000ff0
32 };
33 unsigned hc_possible_num;
34 unsigned sbdn;
35 unsigned hcdn[] = {             //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
36         0x20202020,
37         0x20202020,
38         0x20202020,
39         0x20202020,
40 //        0x20202020,
41 //        0x20202020,
42 //        0x20202020,
43 //        0x20202020,
44 };
45
46 unsigned sbdnx[7];              // for all 8131
47
48 extern void get_sblk_pci1234(void);
49
50 static unsigned get_bus_conf_done = 0;
51
52 void get_bus_conf(void)
53 {
54
55         unsigned apicid_base;
56
57         device_t dev;
58
59         int i;
60
61         if (get_bus_conf_done == 1)
62                 return;         //do it only once
63
64         get_bus_conf_done = 1;
65
66         hc_possible_num = ARRAY_SIZE(pci1234);
67
68         get_sblk_pci1234();
69
70
71         sbdn = ((hcdn[0] >> 8) & 0xff); // first byte of first chain
72         sbdnx[0] = (hcdn[0] & 0xff);
73
74         for (i = 0; i < hc_possible_num; i++) {
75                 sbdnx[i * 2 + 1] = hcdn[i] & 0xff;
76                 sbdnx[i * 2 + 2] = (hcdn[i] >> 8) & 0xff;
77         }
78
79         bus_8131[0][0] = (pci1234[0] >> 16) & 0xff;
80         bus_8111_0 = bus_8131[0][0];
81
82         /* 8111 */
83         dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sbdn, 0));
84         if (dev) {
85                 bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
86                 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
87                 bus_isa++;
88 //              printk_debug("bus_isa=%d\n",bus_isa);
89         } else {
90                 printk_debug
91                     ("ERROR - could not find PCI %02x:03.0, using defaults\n",
92                      bus_8111_0);
93         }
94
95
96         /* 8131-1 */
97         bus_8131[0][0] = 1;
98         dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[1], 0));
99         if (dev) {
100                 bus_8131[0][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
101         } else {
102                 printk_debug
103                     ("ERROR - could not find PCI %02x:01.0, using defaults\n",
104                      bus_8131[0][0]);
105         }
106
107
108         /* 8132-2 */
109         dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[1] + 1, 0));
110         if (dev) {
111                 bus_8131[0][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
112                 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
113                 bus_isa++;
114         } else {
115                 printk_debug
116                     ("ERROR - could not find PCI %02x:02.0, using defaults\n",
117                      bus_8131[0][0]);
118         }
119
120         apicid_base = get_apicid_base(15);
121
122         apicid_8111 = apicid_base++;
123
124         apicid_8131[0][0] = apicid_base++;
125
126         apicid_8131[0][1] = apicid_base++;
127
128
129         /* HT chain 1 */
130         for (i = 1; i < 4; i++) {
131                 if (pci1234[i] & 0x1) {
132                         int j = (i - 1) * 2 + 1;
133                         bus_8131[j][0] = (pci1234[i] >> 16) & 0xff;
134                         /* 8131 */
135                         dev = dev_find_slot(bus_8131[j][0], PCI_DEVFN(sbdnx[j], 0));
136                         if (dev) {
137                                 bus_8131[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
138                         }
139                         apicid_8131[j][0] = apicid_base++;
140                         dev = dev_find_slot(bus_8131[j][0], PCI_DEVFN(sbdnx[j] + 1, 0));
141                         if (dev) {
142                                 bus_8131[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
143                         }
144                         apicid_8131[j][1] = apicid_base++;
145
146                         bus_8131[j + 1][0] = bus_8131[j][0];
147                         /* 8131 */
148                         dev = dev_find_slot(bus_8131[j + 1][0], PCI_DEVFN(sbdnx[j + 1], 0));
149                         if (dev) {
150                                 bus_8131[j + 1][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
151                         }
152                         apicid_8131[j + 1][0] = apicid_base++;
153
154                         dev = dev_find_slot(bus_8131[i + 1][0], PCI_DEVFN(sbdnx[j + 1] + 1, 0));
155                         if (dev) {
156                                 bus_8131[j + 1][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
157                                 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
158                                 bus_isa++;
159
160                         }
161                         apicid_8131[j + 1][0] = apicid_base++;
162                 }
163         }
164 }