src/mainboard/advantech/pcm-5820/devicetree.cb

   1 chip northbridge/amd/gx1                # Northbridge
   2   device pci_domain 0 on                # PCI domain
   3     device pci 0.0 on end               # Host bridge
   4     chip southbridge/amd/cs5530         # Southbridge
   5       device pci 12.0 on                # ISA bridge
   6         chip superio/winbond/w83977f    # SUper I/O
   7           device pnp 3f0.0 on           # Floppy
   8             io 0x60 = 0x3f0
   9             irq 0x70 = 6
  10             drq 0x74 = 2
  11           end
  12           device pnp 3f0.1 on           # Parallel port
  13             io 0x60 = 0x378
  14             irq 0x70 = 7
  15           end
  16           device pnp 3f0.2 on           # COM1
  17             io 0x60 = 0x3f8
  18             irq 0x70 = 4
  19           end
  20           device pnp 3f0.3 on           # COM2
  21             io 0x60 = 0x2f8
  22             irq 0x70 = 3
  23           end
  24           device pnp 3f0.4 on           # RTC / On-Now control
  25             io 0x60 = 0x70
  26             irq 0x70 = 8
  27           end
  28           device pnp 3f0.5 on           # PS/2 keyboard / mouse
  29             io 0x60 = 0x60
  30             io 0x62 = 0x64
  31             irq 0x70 = 1                # PS/2 keyboard interrupt
  32             irq 0x72 = 12               # PS/2 mouse interrupt
  33           end
  34           device pnp 3f0.6 on           # IR
  35             # TODO?
  36           end
  37           device pnp 3f0.7 on           # GPIO 1
  38             # TODO?
  39           end
  40           device pnp 3f0.8 on           # GPIO 2
  41             # TODO?
  42           end
  43         end
  44       end
  45       device pci 12.1 on end            # SMI
  46       device pci 12.2 on end            # IDE
  47       device pci 12.3 on end            # Audio (onboard)
  48       device pci 12.4 on end            # VGA
  49       device pci 13.0 on end            # USB
  50       register "ide0_enable" = "1"
  51       register "ide1_enable" = "1"
  52     end
  53   end
  54   chip cpu/amd/model_gx1                # CPU
  55   end
  56 end