Thanks to Myles' patch adding support for include statements,
[coreboot.git] / src / mainboard / a-trend / atc-6220 / Config.lb
1 ##
2 ## This file is part of the coreboot project.
3 ##
4 ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
5 ##
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
10 ##
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 ## GNU General Public License for more details.
15 ##
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
19 ##
20
21 include /config/nofailovercalculation.lb
22
23 arch i386 end
24 driver mainboard.o
25 if HAVE_PIRQ_TABLE
26         object irq_tables.o
27 end
28 makerule ./failover.E
29         depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
30         action "../romcc -E -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
31 end
32 makerule ./failover.inc
33         depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
34         action "../romcc -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
35 end
36 makerule ./auto.E
37         # depends       "$(MAINBOARD)/auto.c option_table.h ../romcc"
38         depends "$(MAINBOARD)/auto.c ../romcc"
39         action  "../romcc -E -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
40 end
41 makerule ./auto.inc
42         # depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
43         depends "$(MAINBOARD)/auto.c ../romcc"
44         action  "../romcc -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
45 end
46 mainboardinit cpu/x86/16bit/entry16.inc
47 mainboardinit cpu/x86/32bit/entry32.inc
48 ldscript /cpu/x86/16bit/entry16.lds
49 ldscript /cpu/x86/32bit/entry32.lds
50 if USE_FALLBACK_IMAGE
51         mainboardinit cpu/x86/16bit/reset16.inc
52         ldscript /cpu/x86/16bit/reset16.lds
53 else
54         mainboardinit cpu/x86/32bit/reset32.inc
55         ldscript /cpu/x86/32bit/reset32.lds
56 end
57 mainboardinit arch/i386/lib/cpu_reset.inc
58 mainboardinit arch/i386/lib/id.inc
59 ldscript /arch/i386/lib/id.lds
60 if USE_FALLBACK_IMAGE
61         ldscript /arch/i386/lib/failover.lds
62         mainboardinit ./failover.inc
63 end
64 mainboardinit cpu/x86/fpu/enable_fpu.inc
65 mainboardinit cpu/x86/mmx/enable_mmx.inc
66 mainboardinit ./auto.inc
67 mainboardinit cpu/x86/mmx/disable_mmx.inc
68
69 dir /pc80
70 config chip.h
71
72 chip northbridge/intel/i440bx           # Northbridge
73   device apic_cluster 0 on              # APIC cluster
74     chip cpu/intel/slot_2               # CPU (FIXME: It's slot 1, actually)
75       device apic 0 on end              # APIC
76     end
77   end
78   device pci_domain 0 on                # PCI domain
79     device pci 0.0 on end               # Host bridge
80     device pci 1.0 on end               # PCI/AGP bridge
81     chip southbridge/intel/i82371eb     # Southbridge
82       device pci 7.0 on                 # ISA bridge
83         chip superio/winbond/w83977tf   # Super I/O (FIXME: It's W83977EF!)
84           device pnp 3f0.0 on           # Floppy
85             io 0x60 = 0x3f0
86             irq 0x70 = 6
87             drq 0x74 = 2
88           end
89           device pnp 3f0.1 on           # Parallel port
90             io 0x60 = 0x378
91             irq 0x70 = 7
92           end
93           device pnp 3f0.2 on           # COM1
94             io 0x60 = 0x3f8
95             irq 0x70 = 4
96           end
97           device pnp 3f0.3 on           # COM2 / IR
98             io 0x60 = 0x2f8
99             irq 0x70 = 3
100           end
101           device pnp 3f0.5 on           # PS/2 keyboard
102             io 0x60 = 0x60
103             io 0x62 = 0x64
104             irq 0x70 = 1                # PS/2 keyboard interrupt
105             irq 0x72 = 12               # PS/2 mouse interrupt
106           end
107           device pnp 3f0.6 on           # Consumer IR
108           end
109           device pnp 3f0.7 on           # GPIO 1
110           end
111           device pnp 3f0.8 on           # GPIO 2
112           end
113           device pnp 3f0.a on           # ACPI
114           end
115         end
116       end
117       device pci 7.1 on end             # IDE
118       device pci 7.2 on end             # USB
119       device pci 7.3 on end             # ACPI
120       register "ide0_enable" = "1"
121       register "ide1_enable" = "1"
122       register "ide_legacy_enable" = "1"
123       # Enable UDMA/33 for higher speed if your IDE device(s) support it.
124       register "ide0_drive0_udma33_enable" = "0"
125       register "ide0_drive1_udma33_enable" = "0"
126       register "ide1_drive0_udma33_enable" = "0"
127       register "ide1_drive1_udma33_enable" = "0"
128     end
129   end
130 end