2 * This file is part of the coreboot project.
4 * Copyright (C) 2006 Eric Biederman (ebiederm@xmission.com)
5 * Copyright (C) 2007 AMD
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
22 #include <console/console.h>
24 #include <arch/byteorder.h>
30 // Does not work if we want early printk to do usb debug, too..
33 # define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg)
35 #define dbgp_printk(fmt_arg...) do {} while(0)
39 #define USB_DEBUG_DEVNUM 127
41 #define DBGP_DATA_TOGGLE 0x8800
42 #define DBGP_PID_UPDATE(x, tok) \
43 ((((x) ^ DBGP_DATA_TOGGLE) & 0xffff00) | ((tok) & 0xff))
45 #define DBGP_LEN_UPDATE(x, len) (((x) & ~0x0f) | ((len) & 0x0f))
47 * USB Packet IDs (PIDs)
51 #define USB_PID_OUT 0xe1
52 #define USB_PID_IN 0x69
53 #define USB_PID_SOF 0xa5
54 #define USB_PID_SETUP 0x2d
56 #define USB_PID_ACK 0xd2
57 #define USB_PID_NAK 0x5a
58 #define USB_PID_STALL 0x1e
59 #define USB_PID_NYET 0x96
61 #define USB_PID_DATA0 0xc3
62 #define USB_PID_DATA1 0x4b
63 #define USB_PID_DATA2 0x87
64 #define USB_PID_MDATA 0x0f
66 #define USB_PID_PREAMBLE 0x3c
67 #define USB_PID_ERR 0x3c
68 #define USB_PID_SPLIT 0x78
69 #define USB_PID_PING 0xb4
70 #define USB_PID_UNDEF_0 0xf0
72 #define USB_PID_DATA_TOGGLE 0x88
73 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
75 #define PCI_CAP_ID_EHCI_DEBUG 0xa
77 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
78 #define HUB_SHORT_RESET_TIME 10
79 #define HUB_LONG_RESET_TIME 200
80 #define HUB_RESET_TIMEOUT 500
82 #define DBGP_MAX_PACKET 8
84 static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug)
90 ctrl = read32((unsigned long)&ehci_debug->control);
91 /* Stop when the transaction is finished */
99 /* Now that we have observed the completed transaction,
100 * clear the done bit.
102 write32((unsigned long)&ehci_debug->control, ctrl | DBGP_DONE);
103 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
106 static void dbgp_breath(void)
108 /* Sleep to give the debug port a chance to breathe */
111 static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, unsigned ctrl)
118 write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO);
119 ret = dbgp_wait_until_complete(ehci_debug);
120 pids = read32((unsigned long)&ehci_debug->pids);
121 lpid = DBGP_PID_GET(pids);
126 /* If the port is getting full or it has dropped data
127 * start pacing ourselves, not necessary but it's friendly.
129 if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
132 /* If I get a NACK reissue the transmission */
133 if (lpid == USB_PID_NAK) {
141 static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int size)
143 const unsigned char *bytes = buf;
148 for (i = 0; i < 4 && i < size; i++)
149 lo |= bytes[i] << (8*i);
150 for (; i < 8 && i < size; i++)
151 hi |= bytes[i] << (8*(i - 4));
152 write32((unsigned long)&ehci_debug->data03, lo);
153 write32((unsigned long)&ehci_debug->data47, hi);
156 static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size)
158 unsigned char *bytes = buf;
162 lo = read32((unsigned long)&ehci_debug->data03);
163 hi = read32((unsigned long)&ehci_debug->data47);
164 for (i = 0; i < 4 && i < size; i++)
165 bytes[i] = (lo >> (8*i)) & 0xff;
166 for (; i < 8 && i < size; i++)
167 bytes[i] = (hi >> (8*(i - 4))) & 0xff;
170 static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug,
171 unsigned devnum, unsigned endpoint, const char *bytes, int size)
173 u32 pids, addr, ctrl;
176 if (size > DBGP_MAX_PACKET)
179 addr = DBGP_EPADDR(devnum, endpoint);
181 pids = read32((unsigned long)&ehci_debug->pids);
182 pids = DBGP_PID_UPDATE(pids, USB_PID_OUT);
184 ctrl = read32((unsigned long)&ehci_debug->control);
185 ctrl = DBGP_LEN_UPDATE(ctrl, size);
189 dbgp_set_data(ehci_debug, bytes, size);
190 write32((unsigned long)&ehci_debug->address, addr);
191 write32((unsigned long)&ehci_debug->pids, pids);
193 ret = dbgp_wait_until_done(ehci_debug, ctrl);
198 int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size)
200 return dbgp_bulk_write(dbg_info->ehci_debug, dbg_info->devnum,
201 dbg_info->endpoint_out, bytes, size);
204 static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum,
205 unsigned endpoint, void *data, int size)
207 u32 pids, addr, ctrl;
210 if (size > DBGP_MAX_PACKET)
213 addr = DBGP_EPADDR(devnum, endpoint);
215 pids = read32((unsigned long)&ehci_debug->pids);
216 pids = DBGP_PID_UPDATE(pids, USB_PID_IN);
218 ctrl = read32((unsigned long)&ehci_debug->control);
219 ctrl = DBGP_LEN_UPDATE(ctrl, size);
223 write32((unsigned long)&ehci_debug->address, addr);
224 write32((unsigned long)&ehci_debug->pids, pids);
225 ret = dbgp_wait_until_done(ehci_debug, ctrl);
231 dbgp_get_data(ehci_debug, data, size);
235 int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size)
237 return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum,
238 dbg_info->endpoint_in, data, size);
241 static void dbgp_mdelay(int ms)
246 for (i = 0; i < 1000; i++)
251 static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype,
252 int request, int value, int index, void *data, int size)
254 u32 pids, addr, ctrl;
255 struct usb_ctrlrequest req;
259 read = (requesttype & USB_DIR_IN) != 0;
260 if (size > (read ? DBGP_MAX_PACKET:0))
263 /* Compute the control message */
264 req.bRequestType = requesttype;
265 req.bRequest = request;
266 req.wValue = cpu_to_le16(value);
267 req.wIndex = cpu_to_le16(index);
268 req.wLength = cpu_to_le16(size);
270 pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
271 addr = DBGP_EPADDR(devnum, 0);
273 ctrl = read32((unsigned long)&ehci_debug->control);
274 ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req));
278 /* Send the setup message */
279 dbgp_set_data(ehci_debug, &req, sizeof(req));
280 write32((unsigned long)&ehci_debug->address, addr);
281 write32((unsigned long)&ehci_debug->pids, pids);
282 ret = dbgp_wait_until_done(ehci_debug, ctrl);
287 /* Read the result */
288 ret = dbgp_bulk_read(ehci_debug, devnum, 0, data, size);
292 static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
295 u32 delay_time, delay_ms;
298 /* Reset the usb debug port */
299 portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
301 portsc |= PORT_RESET;
302 write32((unsigned long)&ehci_regs->port_status[port - 1], portsc);
304 delay_ms = HUB_ROOT_RESET_TIME;
305 for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
306 delay_time += delay_ms) {
307 dbgp_mdelay(delay_ms);
309 portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
310 if (portsc & PORT_RESET) {
311 /* force reset to complete */
313 write32((unsigned long)&ehci_regs->port_status[port - 1],
314 portsc & ~(PORT_RWC_BITS | PORT_RESET));
316 dbgp_mdelay(delay_ms);
317 portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
318 delay_time += delay_ms;
319 } while ((portsc & PORT_RESET) && (--loop > 0));
321 printk(BIOS_DEBUG, "ehci_reset_port forced done");
325 /* Device went away? */
326 if (!(portsc & PORT_CONNECT))
327 return -1; //-ENOTCONN;
329 /* bomb out completely if something weird happend */
330 if ((portsc & PORT_CSC))
331 return -2; //-EINVAL;
333 /* If we've finished resetting, then break out of the loop */
334 if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
340 static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
345 for (reps = 0; reps < 3; reps++) {
347 status = read32((unsigned long)&ehci_regs->status);
348 if (status & STS_PCD) {
349 ret = ehci_reset_port(ehci_regs, port);
354 return -1; //-ENOTCONN;
358 int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
360 struct ehci_caps *ehci_caps;
361 struct ehci_regs *ehci_regs;
362 struct ehci_dbg_port *ehci_debug;
363 unsigned dbgp_endpoint_out;
364 unsigned dbgp_endpoint_in;
366 struct usb_debug_descriptor dbgp_desc;
367 u32 cmd, ctrl, status, portsc, hcs_params;
368 u32 debug_port, new_debug_port = 0, n_ports;
375 ehci_caps = (struct ehci_caps *)ehci_bar;
376 ehci_regs = (struct ehci_regs *)(ehci_bar +
377 HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase)));
378 ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset);
379 info->ehci_debug = (void *)0;
385 hcs_params = read32((unsigned long)&ehci_caps->hcs_params);
386 debug_port = HCS_DEBUG_PORT(hcs_params);
387 n_ports = HCS_N_PORTS(hcs_params);
389 dbgp_printk("ehci_bar: 0x%x\n", ehci_bar);
390 dbgp_printk("debug_port: %d\n", debug_port);
391 dbgp_printk("n_ports: %d\n", n_ports);
393 for (i = 1; i <= n_ports; i++) {
394 portsc = read32((unsigned long)&ehci_regs->port_status[i-1]);
395 dbgp_printk("PORTSC #%d: %08x\n", i, portsc);
398 if(port_map_tried && (new_debug_port != debug_port)) {
400 set_debug_port(debug_port);
407 /* Reset the EHCI controller */
408 cmd = read32((unsigned long)&ehci_regs->command);
410 write32((unsigned long)&ehci_regs->command, cmd);
413 cmd = read32((unsigned long)&ehci_regs->command);
414 } while ((cmd & CMD_RESET) && (--loop > 0));
417 dbgp_printk("Could not reset EHCI controller.\n");
418 // on some systems it works without succeeding here.
421 dbgp_printk("EHCI controller reset successfully.\n");
424 /* Claim ownership, but do not enable yet */
425 ctrl = read32((unsigned long)&ehci_debug->control);
427 ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
428 write32((unsigned long)&ehci_debug->control, ctrl);
430 /* Start EHCI controller */
431 cmd = read32((unsigned long)&ehci_regs->command);
432 cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
434 write32((unsigned long)&ehci_regs->command, cmd);
436 /* Ensure everything is routed to the EHCI */
437 write32((unsigned long)&ehci_regs->configured_flag, FLAG_CF);
439 /* Wait until the controller is no longer halted */
443 status = read32((unsigned long)&ehci_regs->status);
444 } while ((status & STS_HALT) && (--loop > 0));
447 dbgp_printk("EHCI could not be started.\n");
450 dbgp_printk("EHCI started.\n");
452 /* Wait for a device to show up in the debug port */
453 ret = ehci_wait_for_port(ehci_regs, debug_port);
455 dbgp_printk("No device found in debug port %d\n", debug_port);
456 goto next_debug_port;
458 dbgp_printk("EHCI done waiting for port.\n");
460 /* Enable the debug port */
461 ctrl = read32((unsigned long)&ehci_debug->control);
463 write32((unsigned long)&ehci_debug->control, ctrl);
464 ctrl = read32((unsigned long)&ehci_debug->control);
465 if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
466 dbgp_printk("No device in EHCI debug port.\n");
467 write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM);
471 dbgp_printk("EHCI debug port enabled.\n");
473 /* Completely transfer the debug device to the debug controller */
474 portsc = read32((unsigned long)&ehci_regs->port_status[debug_port - 1]);
476 write32((unsigned long)&ehci_regs->port_status[debug_port - 1], portsc);
480 /* Find the debug device and make it device number 127 */
481 for (devnum = 0; devnum <= 127; devnum++) {
482 ret = dbgp_control_msg(ehci_debug, devnum,
483 USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
484 USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
485 &dbgp_desc, sizeof(dbgp_desc));
490 dbgp_printk("Could not find attached debug device.\n");
495 dbgp_printk("Attached device is not a debug device.\n");
499 dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
500 dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
502 /* Move the device to 127 if it isn't already there */
503 if (devnum != USB_DEBUG_DEVNUM) {
504 ret = dbgp_control_msg(ehci_debug, devnum,
505 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
506 USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
508 dbgp_printk("Could not move attached device to %d.\n",
513 devnum = USB_DEBUG_DEVNUM;
514 dbgp_printk("EHCI debug device renamed to 127.\n");
517 /* Enable the debug interface */
518 ret = dbgp_control_msg(ehci_debug, USB_DEBUG_DEVNUM,
519 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
520 USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
522 dbgp_printk("Could not enable EHCI debug device.\n");
526 dbgp_printk("EHCI debug interface enabled.\n");
528 /* Perform a small write to get the even/odd data state in sync */
529 ret = dbgp_bulk_write(ehci_debug, USB_DEBUG_DEVNUM, dbgp_endpoint_out, "USB\r\n",5);
531 dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
535 dbgp_printk("Test write done\n");
537 info->ehci_caps = ehci_caps;
538 info->ehci_regs = ehci_regs;
539 info->ehci_debug = ehci_debug;
540 info->devnum = devnum;
541 info->endpoint_out = dbgp_endpoint_out;
542 info->endpoint_in = dbgp_endpoint_in;
546 /* Things didn't work so remove my claim */
547 ctrl = read32((unsigned long)&ehci_debug->control);
548 ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
549 write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl);
553 port_map_tried |= (1 << (debug_port - 1));
554 new_debug_port = ((debug_port-1 + 1) % n_ports) + 1;
555 if (port_map_tried != ((1 << n_ports) - 1)) {
556 set_debug_port(new_debug_port);
560 //set_debug_port(new_debug_port);
561 set_debug_port(debug_port);
568 int early_usbdebug_init(void)
570 struct ehci_debug_info *dbg_info = (struct ehci_debug_info *)
571 (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
573 return usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, dbg_info);
576 void usbdebug_tx_byte(unsigned char data)
578 struct ehci_debug_info *dbg_info;
580 /* "Find" dbg_info structure in Cache */
581 dbg_info = (struct ehci_debug_info *)
582 (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
584 if (dbg_info->ehci_debug) {
585 dbgp_bulk_write_x(dbg_info, (char*)&data, 1);