2 * This file is part of the coreboot project.
4 * Copyright (C) 2003 Eric Biederman
5 * Copyright (C) 2006-2010 coresystems GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <pc80/mc146818rtc.h>
26 #if CONFIG_USE_OPTION_TABLE
27 #include "option_table.h"
30 /* Should support 8250, 16450, 16550, 16550A type UARTs */
32 /* Expected character delay at 1200bps is 9ms for a working UART
33 * and no flow-control. Assume UART as stuck if shift register
34 * or FIFO takes more than 50ms per character to appear empty.
36 * Estimated that inb() from UART takes 1 microsecond.
38 #define SINGLE_CHAR_TIMEOUT (50 * 1000)
39 #define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
41 static inline int uart8250_can_tx_byte(unsigned base_port)
43 return inb(base_port + UART_LSR) & UART_LSR_THRE;
46 static inline void uart8250_wait_to_tx_byte(unsigned base_port)
48 unsigned long int i = SINGLE_CHAR_TIMEOUT;
49 while (i-- && !uart8250_can_tx_byte(base_port));
52 static inline void uart8250_wait_until_sent(unsigned base_port)
54 unsigned long int i = FIFO_TIMEOUT;
55 while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT));
58 void uart8250_tx_byte(unsigned base_port, unsigned char data)
60 uart8250_wait_to_tx_byte(base_port);
61 outb(data, base_port + UART_TBR);
64 void uart8250_tx_flush(unsigned base_port)
66 uart8250_wait_until_sent(base_port);
69 int uart8250_can_rx_byte(unsigned base_port)
71 return inb(base_port + UART_LSR) & UART_LSR_DR;
74 unsigned char uart8250_rx_byte(unsigned base_port)
76 unsigned long int i = SINGLE_CHAR_TIMEOUT;
77 while (i-- && !uart8250_can_rx_byte(base_port));
80 return inb(base_port + UART_RBR);
85 void uart8250_init(unsigned base_port, unsigned divisor)
88 /* Disable interrupts */
89 outb(0x0, base_port + UART_IER);
91 outb(UART_FCR_FIFO_EN, base_port + UART_FCR);
93 /* assert DTR and RTS so the other end is happy */
94 outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR);
97 outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR);
99 /* Set Baud Rate Divisor. 12 ==> 9600 Baud */
100 outb(divisor & 0xFF, base_port + UART_DLL);
101 outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
103 /* Set to 3 for 8N1 */
104 outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
110 /* TODO the divisor calculation is hard coded to standard UARTs. Some
111 * UARTs won't work with these values. This should be a property of the
112 * UART used, worst case a Kconfig variable. For now live with hard
113 * codes as the only devices that might be different are the iWave
114 * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
116 unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
118 #if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
119 static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
120 unsigned b_index = 0;
121 #if defined(__PRE_RAM__)
122 b_index = read_option(baud_rate, 0);
124 div = divisor[b_index];
126 if (get_option(&b_index, "baud_rate") == 0) {
127 div = divisor[b_index];
132 uart8250_init(CONFIG_TTYS0_BASE, div);