2 #include <lib.h> /* Prototypes */
3 #include <console/console.h>
5 static void write_phys(unsigned long addr, u32 value)
7 // Assembler in lib/ is very ugly. But we properly guarded
8 // it so let's obey this one for now
13 : "r" (addr), "r" (value) /* inputs */
14 #ifndef __GNUC__ /* GCC does not like empty clobbers? */
19 volatile unsigned long *ptr;
25 static u32 read_phys(unsigned long addr)
27 volatile unsigned long *ptr;
32 static void phys_memory_barrier(void)
39 #ifdef __GNUC__ /* ROMCC does not like memory clobbers */
44 #ifdef __GNUC__ /* ROMCC does not like empty asm statements */
45 asm volatile ("" ::: "memory");
51 * Rotate ones test pattern that access every bit on a 128bit wide
52 * memory bus. To test most address lines, addresses are scattered
53 * using 256B, 4kB and 64kB increments.
55 * @idx Index to test pattern (0=<idx<0x400)
56 * @addr Memory to access on @idx
57 * @value Value to write or read at @addr
59 static inline void test_pattern(unsigned short int idx,
60 unsigned long *addr, unsigned long *value)
65 j = (idx >> 4) & 0x0f;
68 *value = 0x01010101 << (j & 7);
74 * Simple write-read-verify memory test. See console debug output for
75 * any dislocated bytes.
77 * @start System memory offset, aligned to 128bytes
79 static int ram_bitset_nodie(unsigned long start)
81 unsigned long addr, value, value2;
82 unsigned short int idx;
83 unsigned char failed, failures;
86 #if !defined(__ROMCC__)
87 printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start);
89 print_debug("DRAM bitset write: 0x");
90 print_debug_hex32(start);
93 for (idx=0; idx<0x400; idx+=4) {
94 test_pattern(idx, &addr, &value);
95 write_phys(start + addr, value);
98 /* Make sure we don't read before we wrote */
99 phys_memory_barrier();
101 #if !defined(__ROMCC__)
102 printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start);
104 print_debug("DRAM bitset verify: 0x");
105 print_debug_hex32(start);
109 for (idx=0; idx<0x400; idx+=4) {
110 test_pattern(idx, &addr, &value);
111 value2 = read_phys(start + addr);
113 failed = (value2 != value);
115 if (failed && !verbose) {
116 #if !defined(__ROMCC__)
117 printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n",
118 start + addr, value, value2);
120 print_err_hex32(start + addr);
121 print_err(" wr: 0x");
122 print_err_hex32(value);
123 print_err(" rd: 0x");
124 print_err_hex32(value2);
125 print_err(" FAIL\n");
129 #if !defined(__ROMCC__)
130 if ((addr & 0x0f) == 0)
131 printk(BIOS_DEBUG, "%08lx wr: %08lx rd:",
132 start + addr, value);
134 printk(BIOS_DEBUG, " %08lx!", value2);
136 printk(BIOS_DEBUG, " %08lx ", value2);
137 if ((addr & 0x0f) == 0xc)
138 printk(BIOS_DEBUG, "\n");
140 if ((addr & 0x0f) == 0) {
141 print_dbg_hex32(start + addr);
143 print_dbg_hex32(value);
146 print_dbg_hex32(value2);
151 if ((addr & 0x0f) == 0xc)
158 #if !defined(__ROMCC__)
159 printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
161 print_debug("\nDRAM did _NOT_ verify!\n");
166 #if !defined(__ROMCC__)
167 printk(BIOS_DEBUG, "\nDRAM range verified.\n");
169 print_debug("\nDRAM range verified.\n");
177 void ram_check(unsigned long start, unsigned long stop)
180 * This is much more of a "Is my DRAM properly configured?"
181 * test than a "Is my DRAM faulty?" test. Not all bits
184 #if !defined(__ROMCC__)
185 printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start);
187 print_debug("Testing DRAM at: ");
188 print_debug_hex32(start);
191 if (ram_bitset_nodie(start))
193 #if !defined(__ROMCC__)
194 printk(BIOS_DEBUG, "Done.\n");
196 print_debug("Done.\n");
201 int ram_check_nodie(unsigned long start, unsigned long stop)
205 * This is much more of a "Is my DRAM properly configured?"
206 * test than a "Is my DRAM faulty?" test. Not all bits
209 #if !defined(__ROMCC__)
210 printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start);
212 print_debug("Testing DRAM at : ");
213 print_debug_hex32(start);
217 ret = ram_bitset_nodie(start);
218 #if !defined(__ROMCC__)
219 printk(BIOS_DEBUG, "Done.\n");
221 print_debug("Done.\n");
226 void quick_ram_check(void)
230 backup = read_phys(CONFIG_RAMBASE);
231 write_phys(CONFIG_RAMBASE, 0x55555555);
232 phys_memory_barrier();
233 if (read_phys(CONFIG_RAMBASE) != 0x55555555)
235 write_phys(CONFIG_RAMBASE, 0xaaaaaaaa);
236 phys_memory_barrier();
237 if (read_phys(CONFIG_RAMBASE) != 0xaaaaaaaa)
239 write_phys(CONFIG_RAMBASE, 0x00000000);
240 phys_memory_barrier();
241 if (read_phys(CONFIG_RAMBASE) != 0x00000000)
243 write_phys(CONFIG_RAMBASE, 0xffffffff);
244 phys_memory_barrier();
245 if (read_phys(CONFIG_RAMBASE) != 0xffffffff)
248 write_phys(CONFIG_RAMBASE, backup);
251 die("RAM INIT FAILURE!\n");
253 phys_memory_barrier();