2 #ifndef RAMINIT_SYSINFO
3 #define RAMINIT_SYSINFO 0
6 static inline void print_debug_sdram_8(const char *strval, uint32_t val)
9 printk_debug("%s%02x\r\n", strval, val);
11 print_debug(strval); print_debug_hex8(val); print_debug("\r\n");
15 void sdram_no_memory(void)
17 print_err("No memory!!\r\n");
24 #if RAMINIT_SYSINFO == 1
25 void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo)
27 void sdram_initialize(int controllers, const struct mem_controller *ctrl)
31 /* Set the registers we can set once to reasonable values */
32 for(i = 0; i < controllers; i++) {
33 print_debug_sdram_8("Ram1.",i);
35 #if RAMINIT_SYSINFO == 1
36 sdram_set_registers(ctrl + i , sysinfo);
38 sdram_set_registers(ctrl + i);
42 /* Now setup those things we can auto detect */
43 for(i = 0; i < controllers; i++) {
44 print_debug_sdram_8("Ram2.",i);
46 #if RAMINIT_SYSINFO == 1
47 sdram_set_spd_registers(ctrl + i , sysinfo);
49 sdram_set_spd_registers(ctrl + i);
54 /* Now that everything is setup enable the SDRAM.
55 * Some chipsets do the work for us while on others
56 * we need to it by hand.
58 print_debug("Ram3\r\n");
60 #if RAMINIT_SYSINFO == 1
61 sdram_enable(controllers, ctrl, sysinfo);
63 sdram_enable(controllers, ctrl);
66 print_debug("Ram4\r\n");