2 #include <console/console.h>
3 #include <device/device.h>
4 #include <device/path.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include <device/hypertransport.h>
8 #include <part/hard_reset.h>
9 #include <part/fallback_boot.h>
11 static device_t ht_scan_get_devs(device_t *old_devices)
16 while(last && last->sibling &&
17 (last->sibling->path.type == DEVICE_PATH_PCI) &&
18 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
22 *old_devices = last->sibling;
28 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
30 /* Handle bugs in valid hypertransport frequency reporting */
33 freq_cap = pci_read_config16(dev, pos);
34 freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
36 /* AMD 8131 Errata 48 */
37 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
38 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
39 freq_cap &= ~(1 << HT_FREQ_800Mhz);
41 /* AMD 8151 Errata 23 */
42 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
43 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
44 freq_cap &= ~(1 << HT_FREQ_800Mhz);
46 /* AMD K8 Unsupported 1Ghz? */
47 if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
48 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
56 unsigned char config_off, freq_off, freq_cap_off;
59 static int ht_setup_link(struct prev_link *prev, device_t dev, unsigned pos)
61 static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
62 static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
63 unsigned present_width_cap, upstream_width_cap;
64 unsigned present_freq_cap, upstream_freq_cap;
65 unsigned ln_present_width_in, ln_upstream_width_in;
66 unsigned ln_present_width_out, ln_upstream_width_out;
67 unsigned freq, old_freq;
68 unsigned present_width, upstream_width, old_width;
71 /* Set the hypertransport link width and frequency */
74 /* Read the capabilities */
75 present_freq_cap = ht_read_freq_cap(dev, pos + PCI_HT_CAP_SLAVE_FREQ_CAP0);
76 upstream_freq_cap = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
77 present_width_cap = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0);
78 upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
80 /* Calculate the highest useable frequency */
81 freq = log2(present_freq_cap & upstream_freq_cap);
83 /* Calculate the highest width */
84 ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
85 ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
86 if (ln_upstream_width_in > ln_present_width_out) {
87 ln_upstream_width_in = ln_present_width_out;
89 upstream_width = pow2_to_link_width[ln_upstream_width_in];
90 present_width = pow2_to_link_width[ln_upstream_width_in] << 4;
92 ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
93 ln_present_width_in = link_width_to_pow2[present_width_cap & 7];
94 if (ln_upstream_width_out > ln_present_width_in) {
95 ln_upstream_width_out = ln_present_width_in;
97 upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
98 present_width |= pow2_to_link_width[ln_upstream_width_out];
100 /* Set the current device */
101 old_freq = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_FREQ0);
102 if (freq != old_freq) {
103 pci_write_config8(dev, pos + PCI_HT_CAP_SLAVE_FREQ0, freq);
105 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
107 old_width = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0 + 1);
108 if (present_width != old_width) {
109 pci_write_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0 + 1, present_width);
111 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
114 /* Set the upstream device */
115 old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
117 if (freq != old_freq) {
118 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
120 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
122 old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
123 if (upstream_width != old_width) {
124 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
126 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
129 /* Remember the current link as the previous link */
132 prev->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
133 prev->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
134 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
140 static unsigned ht_lookup_slave_capability(struct device *dev)
144 switch(dev->hdr_type & 0x7f) {
145 case PCI_HEADER_TYPE_NORMAL:
146 case PCI_HEADER_TYPE_BRIDGE:
147 pos = PCI_CAPABILITY_LIST;
150 if (pos > PCI_CAP_LIST_NEXT) {
151 pos = pci_read_config8(dev, pos);
153 while(pos != 0) { /* loop through the linked list */
155 cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
156 printk_spew("Capability: 0x%02x @ 0x%02x\n", cap, pos);
157 if (cap == PCI_CAP_ID_HT) {
159 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
160 printk_spew("flags: 0x%04x\n", (unsigned)flags);
161 if ((flags >> 13) == 0) {
162 /* Entry is a Slave secondary, success...*/
166 pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
171 static void ht_collapse_early_enumeration(struct bus *bus)
175 /* Spin through the devices and collapse any early
176 * hypertransport enumeration.
178 for(devfn = 0; devfn <= 0xff; devfn += 8) {
183 dummy.path.type = DEVICE_PATH_PCI;
184 dummy.path.u.pci.devfn = devfn;
185 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
186 if (id == 0xffffffff || id == 0x00000000 ||
187 id == 0x0000ffff || id == 0xffff0000) {
190 dummy.vendor = id & 0xffff;
191 dummy.device = (id >> 16) & 0xffff;
192 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
193 pos = ht_lookup_slave_capability(&dummy);
198 /* Clear the unitid */
199 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
201 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
202 printk_spew("Collapsing %s [%04x/%04x]\n",
203 dev_path(&dummy), dummy.vendor, dummy.device);
207 unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
209 unsigned next_unitid, last_unitid, previous_unitid;
210 uint8_t previous_pos;
211 device_t old_devices, dev, func, *chain_last;
212 unsigned min_unitid = 1;
214 struct prev_link prev;
216 /* Restore the hypertransport chain to it's unitialized state */
217 ht_collapse_early_enumeration(bus);
219 /* See which static device nodes I have */
220 old_devices = bus->children;
222 chain_last = &bus->children;
224 /* Initialize the hypertransport enumeration state */
228 prev.config_off = PCI_HT_CAP_HOST_WIDTH;
229 prev.freq_off = PCI_HT_CAP_HOST_FREQ;
230 prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
232 /* If present assign unitid to a hypertransport chain */
233 last_unitid = min_unitid -1;
234 next_unitid = min_unitid;
238 uint8_t hdr_type, pos;
240 unsigned count, static_count;
242 previous_unitid = last_unitid;
243 last_unitid = next_unitid;
245 /* Get setup the device_structure */
246 dev = ht_scan_get_devs(&old_devices);
251 dummy.path.type = DEVICE_PATH_PCI;
252 dummy.path.u.pci.devfn = 0;
253 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
254 /* If the chain is fully enumerated quit */
255 if (id == 0xffffffff || id == 0x00000000 ||
256 id == 0x0000ffff || id == 0xffff0000) {
259 dev = alloc_dev(bus, &dummy.path);
262 /* Add this device to the pci bus chain */
264 /* Run the magice enable sequence for the device */
265 if (dev->chip_ops && dev->chip_ops->enable_dev) {
266 dev->chip_ops->enable_dev(dev);
268 /* Now read the vendor and device id */
269 id = pci_read_config32(dev, PCI_VENDOR_ID);
272 /* If the chain is fully enumerated quit */
273 if (id == 0xffffffff || id == 0x00000000 ||
274 id == 0x0000ffff || id == 0xffff0000)
277 printk_info("Disabling static device: %s\n",
284 /* Update the device chain tail */
285 for(func = dev; func; func = func->sibling) {
286 chain_last = &func->sibling;
289 /* Read the rest of the pci configuration information */
290 hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
291 class = pci_read_config32(dev, PCI_CLASS_REVISION);
293 /* Store the interesting information in the device structure */
294 dev->vendor = id & 0xffff;
295 dev->device = (id >> 16) & 0xffff;
296 dev->hdr_type = hdr_type;
297 /* class code, the upper 3 bytes of PCI_CLASS_REVISION */
298 dev->class = class >> 8;
300 /* Find the hypertransport link capability */
301 pos = ht_lookup_slave_capability(dev);
303 printk_err("%s Hypertransport link capability not found",
308 /* Update the Unitid of the current device */
309 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
310 flags &= ~0x1f; /* mask out base Unit ID */
311 flags |= next_unitid & 0x1f;
312 pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
314 /* Update the Unitd id in the device structure */
316 for(func = dev; func; func = func->sibling) {
317 func->path.u.pci.devfn += (next_unitid << 3);
318 static_count = (func->path.u.pci.devfn >> 3)
319 - (dev->path.u.pci.devfn >> 3) + 1;
322 /* Compute the number of unitids consumed */
323 count = (flags >> 5) & 0x1f; /* get unit count */
324 printk_spew("%s count: %04x static_count: %04x\n",
325 dev_path(dev), count, static_count);
326 if (count < static_count) {
327 count = static_count;
330 /* Update the Unitid of the next device */
331 next_unitid += count;
333 /* Setup the hypetransport link */
334 reset_needed |= ht_setup_link(&prev, dev, pos);
336 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
338 dev->vendor, dev->device,
339 (dev->enabled? "enabled": "disabled"), next_unitid);
341 } while((last_unitid != next_unitid) && (next_unitid <= 0x1f));
342 #if HAVE_HARD_RESET == 1
344 printk_info("HyperT reset needed\n");
348 printk_debug("HyperT reset not needed\n");
351 if (next_unitid > 0x1f) {
354 return pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);